Timer coalescing explained

Timer coalescing is a computer system energy-saving technique that reduces central processing unit (CPU) power consumption by reducing the precision of software timers used for synchronization of process wake-ups, minimizing the number of times the CPU is forced to perform the relatively power-costly operation of entering and exiting idle states.

Implementations of timer coalescing

• The Linux kernel gained support for deferrable timers in 2.6.22, and controllable "timer slack" for threads in 2.6.28 allowing timer coalescing.
• Timer coalescing has been a feature of Microsoft Windows from Windows 7 onward.^[1]
• Apple's XNU kernel based OS X gained support as of OS X Mavericks.
• FreeBSD supports it since September 2010.^[2]

See also

• Advanced Configuration and Power Interface (ACPI)
• Advanced Programmable Interrupt Controller (APIC)
• High Precision Event Timer (HPET)
• HLT (x86 instruction)
• Interrupt coalescing
• Programmable interval timer
• Time Stamp Counter (TSC)

Notes and References

1. Web site: Windows Timer Coalescing. January 20, 2009. 2009-04-21. Microsoft.
2. Web site: Refactor timer management code. 13 September 2010.