List of interface bit rates explained

This is a list of interface bit rates, is a measure of information transfer rates, or digital bandwidth capacity, at which digital interfaces in a computer or network can communicate over various kinds of buses and channels. The distinction can be arbitrary between a computer bus, often closer in space, and larger telecommunications networks. Many device interfaces or protocols (e.g., SATA, USB, SAS, PCIe) are used both inside many-device boxes, such as a PC, and one-device-boxes, such as a hard drive enclosure. Accordingly, this page lists both the internal ribbon and external communications cable standards together in one sortable table.

Factors limiting actual performance, criteria for real decisions

Most of the listed rates are theoretical maximum throughput measures; in practice, the actual effective throughput is almost inevitably lower in proportion to the load from other devices (network/bus contention), physical or temporal distances, and other overhead in data link layer protocols etc. The maximum goodput (for example, the file transfer rate) may be even lower due to higher layer protocol overhead and data packet retransmissions caused by line noise or interference such as crosstalk, or lost packets in congested intermediate network nodes. All protocols lose something, and the more robust ones that deal resiliently with very many failure situations tend to lose more maximum throughput to get higher total long term rates.

Device interfaces where one bus transfers data via another will be limited to the throughput of the slowest interface, at best. For instance, SATA revision 3.0 (6 Gbit/s) controllers on one PCI Express 2.0 (5 Gbit/s) channel will be limited to the 5 Gbit/s rate and have to employ more channels to get around this problem. Early implementations of new protocols very often have this kind of problem. The physical phenomena on which the device relies (such as spinning platters in a hard drive) will also impose limits; for instance, no spinning platter shipping in 2009 saturates SATA revision 2.0 (3 Gbit/s), so moving from this 3 Gbit/s interface to USB 3.0 at 4.8 Gbit/s for one spinning drive will result in no increase in realized transfer rate.

Contention in a wireless or noisy spectrum, where the physical medium is entirely out of the control of those who specify the protocol, requires measures that also use up throughput. Wireless devices, BPL, and modems may produce a higher line rate or gross bit rate, due to error-correcting codes and other physical layer overhead. It is extremely common for throughput to be far less than half of theoretical maximum, though the more recent technologies (notably BPL) employ preemptive spectrum analysis to avoid this and so have much more potential to reach actual gigabit rates in practice than prior modems.

Another factor reducing throughput is deliberate policy decisions made by Internet service providers that are made for contractual, risk management, aggregation saturation, or marketing reasons. Examples are rate limiting, bandwidth throttling, and the assignment of IP addresses to groups. These practices tend to minimize the throughput available to every user, but maximize the number of users that can be supported on one backbone.

Furthermore, chips are often not available in order to implement the fastest rates. AMD, for instance, does not support the 32-bit HyperTransport interface on any CPU it has shipped as of the end of 2009. Additionally, WiMAX service providers in the US typically support only up to 4 Mbit/s as of the end of 2009.

Choosing service providers or interfaces based on theoretical maxima is unwise, especially for commercial needs. A good example is large scale data centers, which should be more concerned with price per port to support the interface, wattage and heat considerations, and total cost of the solution. Because some protocols such as SCSI and Ethernet now operate many orders of magnitude faster than when originally deployed, scalability of the interface is one major factor, as it prevents costly shifts to technologies that are not backward compatible. Underscoring this is the fact that these shifts often happen involuntarily or by surprise, especially when a vendor abandons support for a proprietary system.

Conventions

By convention, bus and network data rates are denoted either in bits per second (bit/s) or bytes per second (B/s). In general, parallel interfaces are quoted in B/s and serial in bit/s. The more commonly used is shown below in bold type.

On devices like modems, bytes may be more than 8 bits long because they may be individually padded out with additional start and stop bits; the figures below will reflect this. Where channels use line codes (such as Ethernet, Serial ATA, and PCI Express), quoted rates are for the decoded signal.

The figures below are simplex data rates, which may conflict with the duplex rates vendors sometimes use in promotional materials. Where two values are listed, the first value is the downstream rate and the second value is the upstream rate.

The use of decimal prefixes is standard in data communications.

Bandwidths

The figures below are grouped by network or bus type, then sorted within each group from lowest to highest bandwidth; gray shading indicates a lack of known implementations.

As stated above, all quoted bandwidths are for each direction. Therefore, for duplex interfaces (capable of simultaneous transmission both ways), the stated values are simplex (one way) speeds, rather than total upstream+downstream.

Radio clock

Time signal station to radio clock

Teletypewriter (TTY) or telecommunications device for the deaf (TDD)

Technology	Max. rate		Year
TTY (V.18)		6 characters/s^[3]	1994^[4]
TTY (V.18)		6.6 characters/s	1994
NTSC Line 21 Closed Captioning		~100 characters/s	1976^[5]

Modems (narrowband and broadband)

Narrowband (POTS: 4 kHz channel)

Technology	Rate	Rate overhead	Year
align=left	Morse code (skilled operator)		(cps)	1844
align=left	Normal human speech	^[6]		prehistoric
align=left	Teleprinter (50 baud)		404 operations per minute	1940x
align=left	Modem 110 baud (Bell 101)		(~10 cps)	align=left	1959
align=left	Modem 300 (300 baud; Bell 103 or V.21)		(~30 cps)	align=left	1962
align=left	Modem 1200/75 (600 baud; V.23)		(~120 cps)	align=left	1964(?)
align=left	Modem 1200 (600 baud; Vadic VA3400, Bell 212A, or V.22)		(~120 cps)	align=left	1976
align=left	Modem 1200 (Bell 202C, 202D)		(~150 cps)	align=left	?
align=left	Modem 2000 (Bell 201A)		(~250 cps)	align=left	?
align=left	Modem 2400 (Bell 201B)		(~300 cps)	align=left	?
align=left	Modem 2400 (600 baud; V.22bis)			align=left	1984
align=left	Modem 4800/75 (1600 baud; V.27ter)			align=left	1976
align=left	Modem 4800 (1600 baud, Bell 208A, 208B)			align=left
align=left	Modem 9600 (2400 baud; V.32)			align=left	1984
align=left	Modem 14.4 (2400 baud; V.32bis)			align=left	1991
align=left	Modem 28.8 (3200 baud; V.34-1994)			align=left	1994
align=left	Modem 33.6 (3429 baud; V.34-1996/98)			align=left	1996^[7]
align=left	Modem 56k (8000/3429 baud; V.90)			align=left	1998
align=left	Modem 56k (8000/8000 baud; V.92)			align=left	2001
align=left	Modem data compression (variable; V.92/V.44)			align=left	2000
align=left	ISP-side text/image compression (variable)			align=left	1998
align=left	ISDN Basic Rate Interface (single/dual channel)			align=left	1986
align=left	IDSL (dual ISDN + 16 kbit/s data channels)			align=left	2000^[8]

Broadband (hundreds of kHz to GHz wide)

Technology	Rate	Rate overhead	Year
	ADSL (G.lite)				1998
	HDSL ITU a.k.a. DS1				1998^[9]
	MSDSL				?
	SDSL				?
	SHDSL ITU				2001
	ADSL (G.dmt) ITU				1999
	ADSL2 ITU				2002
	ADSL2+ ITU				2003
	DOCSIS 1.0^[10] (cable modem)				1997
	DOCSIS 2.0^[11] (cable modem)				2002
	VDSL ITU				2001
	VDSL2 ITU				2006
	Uni-DSL				2006
	VDSL2 ITU Amendment 1 (11/15)				2015
	BPON (G.983) (fiber optic service)				2005^[12]
	G.fast ITU				2014
	EPON (802.3ah) (fiber optic service)				2008
	DOCSIS 3.0^[13] (cable modem)				2006
	GPON (G.984) (fiber optic service)				2008^[14]
	DOCSIS 3.1^[15] (cable modem)				2013
	10G-PON (G.987) (fiber optic service)				2012^[16]
	DOCSIS 4.0 (cable modem)				2017
	XGS-PON (G.9807.1) (fiber optic service)				2016
	NG-PON2 (G.989) (fiber optic service)				2015^[17]

Mobile telephone interfaces

Technology	Download rate		Upload rate		Year
GSM CSD (2G)	align=right		align=right		align=right		align=right		align=right
HSCSD	align=right		align=right		align=right		align=right		align=right
GPRS (2.5G)	align=right		align=right		align=right		align=right		align=right
WiDEN	align=right		align=right		align=right		align=right		align=right
CDMA2000 1×RTT	align=right		align=right		align=right		align=right		align=right
EDGE (2.75G) (type 1 MS)	align=right		align=right		align=right		align=right		align=right	2002
UMTS 3G	align=right		align=right		align=right		align=right		align=right
EDGE (type 2 MS)	align=right		align=right		align=right		align=right		align=right
EDGE Evolution (type 1 MS)	align=right		align=right		align=right		align=right		align=right
EDGE Evolution (type 2 MS)	align=right		align=right		align=right		align=right		align=right
1×EV-DO rev. 0	align=right		align=right		align=right		align=right		align=right
1×EV-DO rev. A	align=right		align=right		align=right		align=right		align=right
LTE Cat 1	align=right		align=right		align=right		align=right		align=right
1×EV-DO rev. B	align=right		align=right		align=right		align=right		align=right
HSPA (3.5G)	align=right		align=right		align=right		align=right		align=right
4×EV-DO Enhancements (2×2 MIMO)	align=right		align=right		align=right		align=right		align=right
HSPA+ (2×2 MIMO)	align=right		align=right		align=right		align=right		align=right
LTE Cat 2	align=right		align=right		align=right		align=right		align=right
15×EV-DO rev. B	align=right		align=right		align=right		align=right		align=right
LTE Cat 3	align=right		align=right		align=right		align=right		align=right
UMB (2×2 MIMO)	align=right		align=right		align=right		align=right		align=right
LTE Cat 4	align=right		align=right		align=right		align=right		align=right
LTE (2×2 MIMO)	align=right		align=right		align=right		align=right		align=right	2004
UMB (4×4 MIMO)	align=right		align=right		align=right		align=right		align=right
EV-DO rev. C	align=right		align=right		align=right		align=right		align=right
LTE Cat 5	align=right		align=right		align=right		align=right		align=right
LTE Cat 6	align=right		align=right		align=right		align=right		align=right
LTE Cat 7	align=right		align=right		align=right		align=right		align=right
LTE (4×4 MIMO)	align=right		align=right		align=right		align=right		align=right
LTE Cat 13	align=right		align=right		align=right		align=right		align=right
LTE Cat 9	align=right		align=right		align=right		align=right		align=right
LTE Cat 10	align=right		align=right		align=right		align=right		align=right
LTE Cat 11	align=right		align=right		align=right		align=right		align=right
LTE Cat 12	align=right		align=right		align=right		align=right		align=right
LTE Cat 16	align=right		align=right		align=right		align=right		align=right
LTE Cat 18	align=right		align=right		align=right		align=right		align=right
LTE Cat 21	align=right		align=right		align=right		align=right		align=right
LTE Cat 20	align=right		align=right		align=right		align=right		align=right
LTE Cat 8	align=right		align=right		align=right		align=right		align=right
LTE Cat 14	align=right		align=right		align=right		align=right		align=right
5G NR	align=right	?	align=right	?	align=right	?	align=right	?	align=right	?

Wide area networks

Technology	Rate		Year
	align=right		align=right		1990
	align=right		align=right
	align=right		align=right
DS1 / T1 (and ISDN Primary Rate Interface)	align=right		align=right		1990
E1 (and ISDN Primary Rate Interface)	align=right		align=right
	align=right		align=right
LR-VDSL2 (4 to 5 km [long-]range) (symmetry optional)	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
DOCSIS 1.0 (cable modem)	align=right		align=right		1997
DOCSIS 2.0 (cable modem)	align=right		align=right		2002
DS3 / T3 ('45 Meg')	align=right		align=right
	align=right		align=right
VDSL (symmetry optional)	align=right		align=right
	align=right		align=right
VDSL2 (symmetry optional)	align=right		align=right
	align=right		align=right
	align=right		align=right
OC-9	align=right		align=right
	align=right		align=right
OC-18	align=right		align=right
DOCSIS 3.0 (cable modem)	align=right		align=right		2006
	align=right		align=right
OC-36	align=right		align=right
	align=right		align=right
	align=right		align=right
	align=right		align=right
10 Gigabit Ethernet WAN PHY	align=right		align=right
DOCSIS 3.1 (cable modem)	align=right		align=right		2013
DOCSIS 4.0 (cable modem)	align=right		align=right		2017
	align=right		align=right
OC-768 / STM-256	align=right		align=right
OC-1536 / STM-512	align=right		align=right
OC-3072 / STM-1024	align=right		align=right

Local area networks

Technology	Rate		Year
	align=right		align=right		1988
	align=right		align=right		1981
	align=right		align=right		1980
	align=right		align=right		1985
ARCNET (Standard)	align=right		align=right		1977
Chaosnet (Original)	align=right		align=right		1971
Token Ring (Original)	align=right		align=right		1985
Ethernet (10BASE-X)	align=right		align=right		1980 (1985 IEEE Standard)
Token Ring (Later)	align=right		align=right		1989
	align=right		align=right		1992
	align=right		align=right		1993?
	align=right		align=right		1995
Token Ring IEEE 802.5t	align=right		align=right
Fast Ethernet (100BASE-X)	align=right		align=right		1995
	align=right		align=right
MoCA 1.0^[18]	align=right		align=right
MoCA 1.1	align=right		align=right
	align=right		align=right		2005
FireWire (IEEE 1394) 400	align=right		align=right		1995
MoCa 2.0	align=right				2016
	align=right		align=right
	align=right		align=right		2010
Token Ring IEEE 802.5v	align=right		align=right		2001
Gigabit Ethernet (1000BASE-X)	align=right		align=right		1998
Stanford DASH/NUMAlink 1	align=right		align=right		~1990
	align=right		align=right
InfiniBand SDR 1×	align=right		align=right		2001, 2003
Reflective memory or RFM2 (1.25 μs latency)	align=right		align=right		2017
RapidIO Gen1 1×	align=right		align=right		2000
2.5 Gigabit Ethernet (2.5GBASE-T)	align=right		align=right		2016
	align=right		align=right
InfiniBand DDR 1×	align=right		align=right		2005
RapidIO Gen2 1×	align=right		align=right		2008
5 Gigabit Ethernet (5GBASE-T)	align=right		align=right		2016
InfiniBand QDR 1×	align=right		align=right		2007
InfiniBand SDR 4×	align=right		align=right		2001, 2003
	align=right		align=right
RapidIO Gen1 4x	align=right		align=right
RapidIO Gen2 2x	align=right		align=right		2008
10 Gigabit Ethernet (10GBASE-X)	align=right		align=right		2002-2006
	align=right		align=right
InfiniBand FDR-10 1×	align=right		align=right		2011
NUMAlink 2	align=right		align=right		1996
InfiniBand FDR 1×	align=right		align=right		2011
	InfiniBand SDR 8×	align=right		align=right		2001, 2003
InfiniBand DDR 4×	align=right		align=right		2005
RapidIO Gen2 4x	align=right		align=right		2008
Scalable Coherent Interface (SCI) Dual Channel SCI, x8 PCIe	align=right		align=right
InfiniBand SDR 12×	align=right		align=right
RapidIO Gen4 1×	align=right		align=right		2016
InfiniBand EDR 1×^[19]	align=right		align=right		2014
25 Gigabit Ethernet (25GBASE-X)	align=right		align=right		2016
NUMAlink 3	align=right		align=right		2000
InfiniBand DDR 8×	align=right		align=right		2005
InfiniBand QDR 4×	align=right		align=right		2007
RapidIO Gen2 8x	align=right		align=right		2008
40 Gigabit Ethernet (40GBASE-X) 4×	align=right		align=right		2010
InfiniBand FDR-10 4×	align=right		align=right		2011
InfiniBand DDR 12×	align=right		align=right		2005
50 Gigabit Ethernet (50GBASE-X)	align=right		align=right		2016
InfiniBand HDR 1×^[20]	align=right		align=right		2017
NUMAlink 4	align=right		align=right		2004
NUMAlink 6	align=right		align=right		2012
InfiniBand FDR 4×	align=right		align=right		2011
InfiniBand QDR 8×	align=right		align=right		2007
RapidIO Gen2 16×	align=right		align=right		2008
InfiniBand FDR-10 8×	align=right		align=right		2011
InfiniBand QDR 12×	align=right		align=right		2007
InfiniBand EDR 4×	align=right		align=right		2014
100 Gigabit Ethernet (100GBASE-X) 10×/4×	align=right		align=right		2010/2018
	align=right		align=right		2015
InfiniBand NDR 1×	align=right		align=right		2022
	NUMAlink 8 (Flex ASIC)	align=right		align=right		2017
	InfiniBand FDR 8×	align=right		align=right		2011
NUMAlink 7	align=right		align=right		2014
NUMAlink 5	align=right		align=right		2009
InfiniBand FDR-10 12×	align=right		align=right		2011
InfiniBand FDR 12×	align=right		align=right		2011
InfiniBand EDR 8×	align=right		align=right		2014
InfiniBand HDR 4×	align=right		align=right		2017
200 Gigabit Ethernet (200GBASE-X)	align=right		align=right		2017
InfiniBand XDR 1×	align=right		align=right		2024
InfiniBand EDR 12×	align=right		align=right		2014
400 Gigabit Ethernet (400GBASE-X)	align=right		align=right		2017
InfiniBand HDR 8×	align=right		align=right		2017
InfiniBand NDR 4×	align=right		align=right		2022
InfiniBand GDR 1×	align=right		align=right		TBA
InfiniBand HDR 12×	align=right		align=right		2017
InfiniBand NDR 8×	align=right		align=right		2022
InfiniBand XDR 4×	align=right		align=right		2024
800 Gigabit Ethernet (800GBASE-X)	align=right		align=right		2024
InfiniBand NDR 12×	align=right		align=right		2022
	InfiniBand XDR 8×	align=right		align=right		2024
InfiniBand GDR 4×	align=right		align=right		TBA
InfiniBand XDR 12×	align=right		align=right		2024
InfiniBand GDR 8×	align=right		align=right		TBA
InfiniBand GDR 12×	align=right		align=right		TBA

Wireless networks

802.11 networks in infrastructure mode are half-duplex; all stations share the medium. In infrastructure or access point mode, all traffic has to pass through an Access Point (AP). Thus, two stations on the same access point that are communicating with each other must have each and every frame transmitted twice: from the sender to the access point, then from the access point to the receiver. This approximately halves the effective bandwidth.

802.11 networks in ad hoc mode are still half-duplex, but devices communicate directly rather than through an access point. In this mode all devices must be able to see each other, instead of only having to be able to see the access point.

Standard	Maximum Link Rate		Year
	align=right		align=right		1988
	align=right		align=right		1997
RONJA (full duplex)	align=right		align=right		2001
	align=right		align=right		1999
	align=right		align=right		1999
	align=right		align=right		2003
IEEE 802.16 (WiMAX)	align=right		align=right		2004
IEEE 802.11g with Super G by Atheros	align=right		align=right		2003
IEEE 802.11g with 125 High Speed Mode by Broadcom	align=right		align=right		2003
IEEE 802.11g with Nitro by Conexant	align=right		align=right		2003
IEEE 802.11n (aka Wi-Fi 4)	align=right		align=right		2009
IEEE 802.11ac (aka Wi-Fi 5)	align=right		align=right		2012
	align=right		align=right		2011
IEEE 802.11ax (aka Wi-Fi 6/6E)	align=right		align=right		2019
IEEE 802.11be (aka Wi-Fi 7 or Extremely High Throughput (EHT))	align=right	expected	align=right	expected	Late 2024 expected
IEEE 802.11bn (aka Wi-Fi 8 or Ultra High Reliability (UHR))	align=right	expected	align=right	expected	2028 expected
IEEE 802.11ay (aka Enhanced Throughput for Operation in License -exempt Bands above 45 GHz)	align=right	expected	align=right	expected	March 2021 standardized

Wireless personal area networks

Technology	Rate		Year
	align=right		align=right
IrDA-Control	align=right		align=right
IrDA-SIR	align=right		align=right
802.15.4 (2.4 GHz)	align=right		align=right
	align=right		align=right		2002
	align=right		align=right		2004
IrDA-FIR	align=right		align=right
IrDA-VFIR	align=right		align=right
	align=right		align=right		2009
	align=right		align=right		2010
	align=right		align=right		2016
IrDA-UFIR	align=right		align=right
	align=right		align=right
IrDA-Giga-IR	align=right		align=right

Computer buses

Main buses

Technology	Rate		Year
	align=right		align=right		1992 (standardized)
Apple II series (incl. Apple IIGS) 8-bit/1 MHz	align=right		align=right	^[21] ^[22]	1977
SS-50 Bus 8-bit/1(?) MHz	align=right		align=right		1975
STD-80 8-bit/8 MHz	align=right		align=right
ISA 8-Bit/4.77 MHz	align=right	0 W/S: every 4 clocks 8 bits 1 W/S: every 5 clocks 8 bits	align=right	0 W/S: every 4 clocks 1 byte 1 W/S: every 5 clocks 1 byte	1981 (created)
STD-80 16-bit/8 MHz	align=right		align=right
I3C (HDR mode)^[23]		align=right		2017
Zorro II 16-bit/7.14 MHz^[24]	align=right		align=right		1986
ISA 16-Bit/8.33 MHz	align=right		align=right		1984 (created)
Europe Card Bus 8-Bit/10 MHz	align=right		align=right		1977 (created)
S-100 bus 8-bit/10 MHz	align=right		align=right		1976 (published)
Serial Peripheral Interface (Up to 100 MHz)	align=right		align=right		1989
	align=right		align=right		2002
STEbus 8-Bit/16 MHz	align=right		align=right		1987 (standardized)
C-Bus 16-bit/10 MHz	align=right		align=right	^[25]	1982
	align=right		align=right
STD-32 32-bit/8 MHz	align=right		align=right	^[26]
NESA 32-bit/8 MHz	align=right		align=right	^[27]
EISA 32-bit/8.33 MHz	align=right		align=right		1988
VME64 32-64bit	align=right		align=right		1981
MCA 32bit/10 MHz	align=right		align=right		1987
NuBus 10 MHz	align=right		align=right		1987 (standardized)
DEC TURBOchannel 32-bit/12.5 MHz	align=right		align=right
NuBus90 20 MHz	align=right		align=right		1991
MCA 32bit/20 MHz	align=right		align=right	^[28]	1992
APbus 32-bit/25(?) MHz	align=right		align=right	^[29]
Sbus 32-bit/25 MHz	align=right		align=right		1989
DEC TURBOchannel 32-bit/25 MHz	align=right		align=right
Local Bus 98 32-bit/33 MHz	align=right		align=right	^[30]
VESA Local Bus (VLB) 32-bit/33 MHz	align=right		align=right		1992
PCI 32-bit/33 MHz	align=right		align=right		1993
	align=right		align=right
Zorro III 32-bit/async (eq. 37.5 MHz)^[31] ^[32]	align=right		align=right	^[33]	1990
VESA Local Bus (VLB) 32-bit/40 MHz	align=right		align=right		1992
Sbus 64-bit/25 MHz	align=right		align=right		1995
	align=right		align=right
PCI 64-bit/33 MHz	align=right		align=right		1993
PCI 32-bit/66 MHz	align=right		align=right		1995
AGP 1×	align=right		align=right		1997
PCI Express 1.0 (×1 link)	align=right		align=right		2004
RapidIO Gen1 1×	align=right		align=right
HIO bus	align=right		align=right
GIO64 64-bit/40 MHz	align=right		align=right
PCI Express 2.0 (×1 link)	align=right		align=right		2007
AGP 2×	align=right		align=right		1997
PCI 64-bit/66 MHz	align=right		align=right
PCI-X DDR 16-bit	align=right		align=right
RapidIO Gen2 1×	align=right		align=right
PCI 64-bit/100 MHz	align=right		align=right
PCI Express 3.0 (×1 link)	align=right		align=right		2011
Unified Media Interface (UMI) (×4 link)	align=right		align=right		2011
Direct Media Interface (DMI) (×4 link)	align=right		align=right		2004
Enterprise Southbridge Interface (ESI)	align=right		align=right
PCI Express 1.0 (×4 link)	align=right		align=right		2004
AGP 4×	align=right		align=right		1998
PCI-X 133	align=right		align=right
PCI-X QDR 16-bit	align=right		align=right
InfiniBand single 4×^[34]	align=right		align=right
RapidIO Gen1 4×	align=right		align=right
RapidIO Gen2 2×	align=right		align=right
	align=right		align=right
Unified Media Interface 2.0 (UMI 2.0; ×4 link)	align=right		align=right		2012
Direct Media Interface 2.0 (DMI 2.0; ×4 link)	align=right		align=right		2011
PCI Express 1.0 (×8 link)	align=right		align=right		2004
PCI Express 2.0 (×4 link)	align=right		align=right		2007
AGP 8×	align=right		align=right		2002
PCI-X DDR	align=right		align=right
RapidIO Gen2 4×	align=right		align=right
Sun JBus (200 MHz)	align=right		align=right		2003
HyperTransport (800 MHz, 16-pair)	align=right		align=right		2001
PCI Express 3.0 (×4 link)	align=right		align=right		2011
HyperTransport (1 GHz, 16-pair)	align=right		align=right
PCI Express 1.0 (×16 link)	align=right		align=right		2004
PCI Express 2.0 (×8 link)	align=right		align=right		2007
PCI-X QDR	align=right		align=right
AGP 8× 64-bit	align=right		align=right
RapidIO Gen2 8x	align=right		align=right
Direct Media Interface 3.0 (DMI 3.0; ×4 link)	align=right		align=right		2015
CXL Specification 3.0 & 3.1 (×1 link)		align=right		2022, 2023
PCI Express 3.0 (×8 link)	align=right		align=right		2011
PCI Express 2.0 (×16 link)	align=right		align=right		2007
RapidIO Gen2 16x	align=right		align=right
PCI Express 5.0 (×4 link)		align=right		2019
PCI Express 3.0 (×16 link)	align=right		align=right		2011
CAPI			2014
QPI (4.80GT/s, 2.40 GHz)	align=right		align=right
HyperTransport 2.0 (1.4 GHz, 32-pair)	align=right		align=right		2004
QPI (5.86GT/s, 2.93 GHz)	align=right		align=right
QPI (6.40GT/s, 3.20 GHz)	align=right		align=right
QPI (7.2GT/s, 3.6 GHz)	align=right		align=right		2012
PCI Express 6.0 (×4 link)		align=right		2022
PCI Express 4.0 (×16 link)^[35]	align=right		align=right		2018
	align=right		align=right		2016
QPI (8.0GT/s, 4.0 GHz)	align=right		align=right		2012
QPI (9.6GT/s, 4.8 GHz)	align=right		align=right		2014
HyperTransport 3.0 (2.6 GHz, 32-pair)	align=right		align=right		2006
HyperTransport 3.1 (3.2 GHz, 32-pair)	align=right		align=right		2008
CXL Specification 1.x & 2.0 (×16 link)		align=right		2019, 2020
PCI Express 5.0 (×16 link) ^[36]		align=right		2019
NVLink 1.0	align=right		align=right		2016
PCI Express 6.0 (×16 link) ^[37]		align=right		2022
CXL Specification 3.0 & 3.1 (×16 link)		align=right		2022, 2023
NVLink 2.0	align=right		align=right		2017
PCI Express 7.0 (×16 link)		align=right		2025
Infinity Fabric (Max. theoretical)	align=right		align=right		2017

LPC protocol includes high overhead. While the gross data rate equals 33.3 million 4-bit-transfers per second (or), the fastest transfer, firmware read, results in . The next fastest bus cycle, 32-bit ISA-style DMA write, yields only . Other transfers may be as low as .^[38]

Uses 128b/130b encoding, meaning that about 1.54% of each transfer is used for error detection instead of carrying data between the hardware components at each end of the interface. For example, a single link PCIe 3.0 interface has an 8 Gbit/s transfer rate, yet its usable bandwidth is only about 7.88 Gbit/s.

Uses 8b/10b encoding, meaning that 20% of each transfer is used by the interface instead of carrying data from between the hardware components at each end of the interface. For example, a single link PCIe 1.0 has a 2.5 Gbit/s transfer rate, yet its usable bandwidth is only 2 Gbit/s (250 ).

Uses PAM-4 encoding and a 256 bytes FLIT block, of which 14 bytes are FEC and CRC, meaning that 5.47% of total data rate is used for error detection and correction instead of carrying data. For example, a single link PCIe 6.0 interface has an 64 Gbit/s total transfer rate, yet its usable bandwidth is only 60.5 Gbit/s.

Portable

Technology	Rate		Year
PC Card 16-bit 255 ns byte mode	align=right		align=right		1990
PC Card 16-bit 255 ns word mode	align=right		align=right
PC Card 16-bit 100 ns byte mode	align=right		align=right
PC Card 16-bit 100 ns word mode	align=right		align=right
PC Card 32-bit (CardBus) byte mode	align=right		align=right
ExpressCard 1.2 USB 2.0 mode	align=right		align=right		2003
PC Card 32-bit (CardBus) word mode	align=right		align=right
PC Card 32-bit (CardBus) doubleword mode	align=right		align=right
ExpressCard 1.2 PCI Express mode	align=right		align=right		2008
ExpressCard 2.0 USB 3.0 mode	align=right		align=right
ExpressCard 2.0 PCI Express mode	align=right		align=right		2009

Storage

Technology	Rate		Year
Teletype Model 33 paper tape	align=right		align=right		1963
TRS-80 Model 1 Level 1 BASIC cassette tape interface	align=right		align=right		1977
C2N Commodore Datasette 1530 cassette tape interface	align=right		align=right		1977
Apple II cassette tape interface	align=right		align=right		1977
Amstrad CPC tape	align=right		align=right		1984
Single Density 8-inch FM Floppy Disk Controller (160 KB)	align=right		align=right		1973
Single Density 5.25-inch FM Floppy Disk Controller (180 KB)	align=right		align=right		1978
High Density MFM Floppy Disk Controller (1.2 MB/1.44 MB)	align=right		align=right		1984
CD Controller (1×)	align=right		align=right		1988
MFM hard disk	align=right		align=right		1980
RLL hard disk	align=right		align=right
DVD Controller (1×)	align=right		align=right
	align=right		align=right
ATA PIO Mode 0	align=right		align=right		1986
HD DVD Controller (1×)	align=right		align=right
Blu-ray Controller (1×)	align=right		align=right
SCSI (Narrow SCSI) (5 MHz)	align=right		align=right		1986
ATA PIO Mode 1	align=right		align=right		1994
ATA PIO Mode 2	align=right		align=right		1994
Fast SCSI (8 bits/10 MHz)	align=right		align=right
ATA PIO Mode 3	align=right		align=right		1996
AoE over Fast Ethernet	align=right		align=right		2009
iSCSI over Fast Ethernet	align=right		align=right		2004
ATA PIO Mode 4	align=right		align=right		1996
Fast Wide SCSI (16 bits/10 MHz)	align=right		align=right
Ultra SCSI (Fast-20 SCSI) (8 bits/20 MHz)	align=right		align=right
SD (High Speed)		align=right
Ultra DMA ATA 33	align=right		align=right		1998
Ultra Wide SCSI (16 bits/20 MHz)	align=right		align=right
Ultra-2 SCSI 40 (Fast-40 SCSI) (8 bits/40 MHz)	align=right		align=right
SDHC/SDXC/SDUC (UHS-I Full Duplex)		align=right
Ultra DMA ATA 66	align=right		align=right		2000
Blu-ray Controller (16×)	align=right		align=right
Ultra-2 wide SCSI (16 bits/40 MHz)	align=right		align=right
	align=right		align=right		1990
Ultra DMA ATA 100	align=right		align=right		2002
Fibre Channel 1GFC (1.0625 GHz)	align=right		align=right		1997
AoE over gigabit Ethernet, jumbo frames	align=right		align=right		2009
iSCSI over gigabit Ethernet, jumbo frames	align=right		align=right		2004
Ultra DMA ATA 133	align=right		align=right		2005
SDHC/SDXC/SDUC (UHS-II Full Duplex)		align=right
Ultra-3 SCSI (Ultra 160 SCSI; Fast-80 Wide SCSI) (16 bits/40 MHz DDR)	align=right		align=right
	align=right		align=right		2003
Fibre Channel 2GFC (2.125 GHz)	align=right		align=right		2001
Ultra-320 SCSI (Ultra4 SCSI) (16 bits/80 MHz DDR)	align=right		align=right
Serial Attached SCSI (SAS) SAS-1	align=right		align=right		2004
	align=right		align=right		2004
SDHC/SDXC/SDUC (UHS-III Full Duplex)		align=right
Fibre Channel 4GFC (4.25 GHz)	align=right		align=right		2004
Serial Attached SCSI (SAS) SAS-2	align=right		align=right		2009
	align=right		align=right		2008
Fibre Channel 8GFC (8.50 GHz)	align=right		align=right		2005
SDHC/SDXC/SDUC (SD Express)		align=right
	align=right		align=right		2009
	align=right		align=right		2004
	align=right		align=right		2009
Serial Attached SCSI (SAS) SAS-3	align=right		align=right		2013
Fibre Channel 16GFC (14.025 GHz)	align=right		align=right		2011
	align=right		align=right		2013
Serial Attached SCSI (SAS) SAS-4	align=right		align=right		2017
UFS (version 3.0)		align=right		2018
Fibre Channel 32GFC (28.05 GHz)	align=right		align=right		2016
NVMe over M.2 or U.2 (using PCI Express 3.0 ×4 link)	align=right		align=right		2013
iSCSI over InfiniBand 4×	align=right		align=right		2007
NVMe over M.2 or U.2 (using PCI Express 4.0 ×4 link)	align=right		align=right		2017
iSCSI over 100G Ethernet	align=right		align=right		2010
FCoE over 100G Ethernet	align=right		align=right		2010
NVMe over M.2, U.2, U.3 or EDSFF (using PCI Express 5.0 ×4 link)	align=right		align=right		2019

Uses 8b/10b encoding Uses 64b/66b encoding Uses 128b/150b encoding

Peripheral

Technology	Rate		Year
	align=right		align=right		1986
	align=right		align=right		1987
	align=right		align=right		1983
CBM Bus max^[39]	align=right		align=right		1981
Serial RS-232 max	align=right		align=right		1962
	align=right		align=right		1998
Parallel (Centronics/IEEE 1284)		align=right
Serial 16550 UART max	align=right		align=right
USB 1.0 low speed	align=right		align=right		1996
Serial UART max	align=right		align=right
GPIB/HPIB (IEEE-488.1) IEEE-488 max.	align=right		align=right
Serial EIA-422 max.	align=right		align=right
USB 1.0 full speed	align=right		align=right		1996
Parallel (Centronics/IEEE 1284) EPP (Enhanced Parallel Port)		align=right		1992
Parallel (Centronics/IEEE 1284) ECP (Extended Capability Port)			1994
Serial EIA-485 max.	align=right		align=right
GPIB/HPIB (IEEE-488.1-2003) IEEE-488 max.	align=right		align=right
FireWire (IEEE 1394) 100	align=right		align=right		1995
FireWire (IEEE 1394) 200	align=right		align=right		1995
FireWire (IEEE 1394) 400	align=right		align=right		1995
USB 2.0 high speed	align=right		align=right		2000
FireWire (IEEE 1394b) 800^[40]	align=right		align=right		2002
	align=right		align=right
FireWire (IEEE 1394b) 1600	align=right		align=right		2007
	align=right		align=right
eSATA (SATA 300)	align=right		align=right		2004
CoaXPress Base (up and down bidirectional link)	align=right	+	align=right		2009
FireWire (IEEE 1394b) 3200	align=right		align=right		2007
	align=right		align=right
	align=right		align=right
USB 3.0 SuperSpeed (aka USB 3.1 Gen 1, USB 3.2 Gen 1x1)	align=right		align=right		2010
eSATA (SATA 600)	align=right		align=right		2011
CoaXPress full (up and down bidirectional link)	align=right	+	align=right		2009
	align=right		align=right
USB 3.1 SuperSpeed+ (aka USB 3.1 Gen 2, USB 3.2 Gen 1x2, USB 3.2 Gen 2x1, USB4 Gen 2×1)	align=right		align=right		2013
	align=right		align=right
	align=right		align=right		2011
USB 3.2 SuperSpeed+ (aka USB 3.2 Gen 2×2 USB4 Gen 2×2, USB4 Gen 3×1)^[41]	align=right		align=right		2017
	align=right		align=right		2013
FPGA Mezzanine Card Plus (FMC+)^[42]	28 Gbit/s	align=right	3.5 GB/s	2019
	align=right		align=right
USB4 Gen 3×2^[43]		align=right		2019
	align=right		align=right		2015
Thunderbolt 4	align=right		align=right		2020
	align=right		align=right
USB4 Gen 4 ^[44]		align=right		2022
Thunderbolt 5	align=right		align=right		2024
USB4 Gen 4 Asymmetric		align=right		2022
Thunderbolt 5 Asymmetric	align=right		align=right		2024

MAC to PHY

Technology	Channels	Bits	MGT Lanes			Rate		Year
			Count	Encoding	Rate
Media Independent Interface (MII)	1	4
Reduced MII (RMII)	1	2
Serial MII (SMII)	1	1
Gigabit MII (GMII)	1	8
Reduced gigabit/s MII (RGMII)	1	4
Ten-bit interface (TBI)	1	10
Serial gigabit/s MII (SGMII)	1		1	8b/10b
Reduced serial gigabit/s MII (RSGMII)	2		1	8b/10b
Reduced serial gigabit/s MII plus (RSGMII-PLUS)	4		1	8b/10b
Quad serial gigabit/s MII (QSGMII)	4		1	8b/10b
10 gigabit/s MII (XGMII)	1	32
XGMII attachment unit interface (XAUI)	1		4	8b/10b
Reduced Pin XAUI (RXAUI)	1		2	8b/10b
XFI/SFI	1		1	64b/66b
40 gigabit/s MII (XLGMII, on-chip only)	1
100 gigabit/s MII (CGMII, on-chip only)	1							2008
100G AUI (CAUI-10)	1		10	64b/66b
100G AUI (CAUI-4)	1		4	64b/66b

PHY to XPDR

Dynamic random-access memory

The table below shows values for PC memory module types.These modules usually combine multiple chips on one circuit board.SIMM modules connect to the computer via an 8-bit- or 32-bit-wide interface. RIMM modules used by RDRAM are 16-bit- or 32-bit-wide.^[45] DIMM modules connect to the computer via a 64-bit-wide interface.Some other computer architectures use different modules with a different bus width.

In a single-channel configuration, only one module at a time can transfer information to the CPU.In multi-channel configurations, multiple modules can transfer information to the CPU at the same time, in parallel.FPM, EDO, SDR, and RDRAM memory was not commonly installed in a dual-channel configuration. DDR and DDR2 memory is usually installed in single- or dual-channel configuration. DDR3 memory is installed in single-, dual-, tri-, and quad-channel configurations.Bit rates of multi-channel configurations are the product of the module bit-rate (given below) and the number of channels.

Module type	Chip type	Internal clock	Bus clock	Bus speed	Transfer rate
FPM DRAM	70 ns tRAC		align=right		align=right			align=right
EDO DRAM (486 CPU)	60 ns tRAC		align=right		align=right			align=right
EDO DRAM (Pentium CPU)	60 ns tRAC		align=right		align=right			align=right
PC-66 SDR SDRAM	10/15 ns	align=right		align=right		align=right		align=right		align=right
PC-100 SDR SDRAM	8 ns	align=right		align=right		align=right		align=right		align=right
PC-133 SDR SDRAM	7/7.5 ns	align=right		align=right		align=right		align=right		align=right
RIMM-1200 RDRAM	PC600	align=right		align=right		align=right		align=right		align=right
RIMM-1400 RDRAM	PC700	align=right		align=right		align=right		align=right		align=right
RIMM-1600 RDRAM	PC800	align=right		align=right		align=right		align=right		align=right
PC-1600 DDR SDRAM	DDR-200	align=right		align=right		align=right		align=right		align=right
RIMM-2100 RDRAM	PC1066	align=right		align=right		align=right		align=right		align=right
PC-2100 DDR SDRAM	DDR-266	align=right		align=right		align=right		align=right		align=right
RIMM-2400 RDRAM	PC1200	align=right		align=right		align=right		align=right		align=right
PC-2700 DDR SDRAM	DDR-333	align=right		align=right		align=right		align=right		align=right
PC-3200 DDR SDRAM	DDR-400	align=right		align=right		align=right		align=right		align=right
PC2-3200 DDR2 SDRAM	DDR2-400	align=right		align=right		align=right		align=right		align=right
PC-3500 DDR SDRAM	DDR-433	align=right		align=right		align=right		align=right		align=right
PC-3700 DDR SDRAM	DDR-466	align=right		align=right		align=right		align=right		align=right
PC-4000 DDR SDRAM	DDR-500	align=right		align=right		align=right		align=right		align=right
PC-4200 DDR SDRAM	DDR-533	align=right		align=right		align=right		align=right		align=right
PC2-4200 DDR2 SDRAM	DDR2-533	align=right		align=right		align=right		align=right		align=right
PC-4400 DDR SDRAM	DDR-550	align=right		align=right		align=right		align=right		align=right
PC-4800 DDR SDRAM	DDR-600	align=right		align=right		align=right		align=right		align=right
PC2-5300 DDR2 SDRAM	DDR2-667	align=right		align=right		align=right		align=right		align=right
PC2-6000 DDR2 SDRAM	DDR2-750	align=right		align=right		align=right		align=right		align=right
PC2-6400 DDR2 SDRAM	DDR2-800	align=right		align=right		align=right		align=right		align=right
PC3-6400 DDR3 SDRAM	DDR3-800	align=right		align=right		align=right		align=right		align=right
PC2-7200 DDR2 SDRAM	DDR2-900	align=right		align=right		align=right		align=right		align=right
PC2-8000 DDR2 SDRAM	DDR2-1000	align=right		align=right		align=right		align=right		align=right
PC2-8500 DDR2 SDRAM	DDR2-1066	align=right		align=right		align=right		align=right		align=right
PC3-8500 DDR3 SDRAM	DDR3-1066	align=right		align=right		align=right		align=right		align=right
PC2-8800 DDR2 SDRAM	DDR2-1100	align=right		align=right		align=right		align=right		align=right
PC2-9200 DDR2 SDRAM	DDR2-1150	align=right		align=right		align=right		align=right		align=right
PC2-9600 DDR2 SDRAM	DDR2-1200	align=right		align=right		align=right		align=right		align=right
PC2-10000 DDR2 SDRAM	DDR2-1250	align=right		align=right		align=right		align=right		align=right
PC3-10600 DDR3 SDRAM	DDR3-1333	align=right		align=right		align=right		align=right		align=right
PC3-11000 DDR3 SDRAM	DDR3-1375	align=right		align=right		align=right		align=right		align=right
PC3-12800 DDR3 SDRAM	DDR3-1600	align=right		align=right		align=right		align=right		align=right
PC3-13000 DDR3 SDRAM	DDR3-1625	align=right		align=right		align=right		align=right		align=right
PC3-14400 DDR3 SDRAM	DDR3-1800	align=right		align=right		align=right		align=right		align=right
PC3-14900 DDR3 SDRAM	DDR3-1866	align=right		align=right		align=right		align=right		align=right
PC3-16000 DDR3 SDRAM	DDR3-2000	align=right		align=right		align=right		align=right		align=right
PC3-17000 DDR3 SDRAM	DDR3-2133	align=right		align=right		align=right		align=right		align=right
PC4-17000 DDR4 SDRAM	DDR4-2133	align=right		align=right		align=right		align=right		align=right
PC3-17600 DDR3 SDRAM	DDR3-2200	align=right		align=right		align=right		align=right		align=right
PC3-19200 DDR3 SDRAM	DDR3-2400	align=right		align=right		align=right		align=right		align=right
PC4-19200 DDR4 SDRAM	DDR4-2400	align=right		align=right		align=right		align=right		align=right
PC3-21300 DDR3 SDRAM	DDR3-2666	align=right		align=right		align=right		align=right		align=right
PC4-21300 DDR4 SDRAM	DDR4-2666	align=right		align=right		align=right		align=right		align=right
PC3-24000 DDR3 SDRAM	DDR3-3000	align=right		align=right		align=right		align=right		align=right
PC4-24000 DDR4 SDRAM	DDR4-3000	align=right		align=right		align=right		align=right		align=right
PC4-25600 DDR4 SDRAM	DDR4-3200	align=right		align=right		align=right		align=right		align=right
PC5-41600 DDR5 SDRAM	DDR5-5200	align=right		align=right		align=right		align=right		align=right
PC5-44800 DDR5 SDRAM	DDR5-5600	align=right		align=right		align=right		align=right		align=right
PC5-51200 DDR5 SDRAM	DDR5-6400	align=right		align=right		align=right		align=right		align=right
PC5-57600 DDR5 SDRAM	DDR5-7200	align=right		align=right		align=right		align=right		align=right
PC5-64000 DDR5 SDRAM	DDR5-8000	align=right		align=right		align=right		align=right		align=right
PC5-70400 DDR5 SDRAM	DDR5-8800	align=right		align=right		align=right		align=right		align=right

The clock rate at which DRAM memory cells operate. The memory latency is largely determined by this rate. Note that until the introduction of DDR4 the internal clock rate saw relatively slow progress. DDR/DDR2/DDR3 memory uses 2n/4n/8n (respectively) prefetch buffer to provide higher throughput, while the internal memory speed remains similar to that of the previous generation.

The memory speed or clock rate advertised by manufactures and suppliers usually refers to this rate (with 1 GT/s = 1 GHz). Note that modern types of memory use DDR bus with two transfers per clock.

Graphics processing units' RAM

RAM memory modules are also utilised by graphics processing units; however, memory modules for those differ somewhat from standard computer memory, particularly with lower power requirements, and are specialised to serve GPUs: for example, GDDR3 was fundamentally based on DDR2. Every graphics memory chip is directly connected to the GPU (point-to-point). The total GPU memory bus width varies with the number of memory chips and the number of lanes per chip. For example, GDDR5 specifies either 16 or 32 lanes per device (chip), while GDDR5X specifies 64 lanes per chip. Over the years, bus widths rose from 64-bit to 512-bit and beyond: e.g. HBM is 1024 bits wide.^[46] Because of this variability, graphics memory speeds are sometimes compared per pin. For direct comparison to the values for 64-bit modules shown above, video RAM is compared here in 64-lane lots, corresponding to two chips for those devices with 32-bit widths.In 2012, high-end GPUs used 8 or even 12 chips with 32 lanes each, for a total memory bus width of 256 or 384 bits. Combined with a transfer rate per pin of 5 GT/s or more, such cards could reach 240 GB/s or more.

RAM frequencies used for a given chip technology vary greatly. Where single values are given below, they are examples from high-end cards.^[47] Since many cards have more than one pair of chips, the total bandwidth is correspondingly higher. For example, high-end cards often have eight chips, each 32 bits wide, so the total bandwidth for such cards is four times the value given below.

Chip type	Module type	Memory clock	Transfers/s	Bandwidth
DDR	64 lanes				<	-- GF 6800 -->
DDR2	64 lanes				<	-- GF 5800 Ultra -->
GDDR3	64 lanes				<	-- GF GTX 285 -->
GDDR4	64 lanes				<	-- Rd HD 4670 -->
GDDR5^[48]	64 lanes
GDDR5X^[49]	64 lanes
GDDR6	64 lanes
GDDR6X^[50]	64 lanes
HBM^[51]	1024 lanes (8 channels @ 128 lanes ea)
HBM2	1024 lanes (8 channels @ 128 lanes ea)
HBM2e^[52]	1024 lanes (8 channels @ 128 lanes ea)
HBM3^[53]	1024 lanes (16 channels @ 64 lanes ea)
HMC	128 lanes (8 links @ 16 lanes ea)	(internal)
HMC2	64 lanes (4 links @ 16 lanes ea)	(internal)
HBM3e^[54]	1024 lanes (16 channels @ 64 lanes ea)	up to	up to	up to	up to

Digital audio

Device	Rate
I²S	@ 24bit/48 kHz
AES/EBU	@ 24-bit/48 kHz
ADAT Lightpipe (Type I)		1.152
AC'97
HDMI
Intel High Definition Audio rev. 1.0^[55]	outbound; 24 Mbit/s inbound	outbound; 3 inbound
MADI

Digital video interconnects

Data rates given are from the video source (e.g., video card) to receiving device (e.g., monitor) only. Out of band and reverse signaling channels are not included.

Device	Rate		Year
HD-SDI (SMPTE 292M)
Camera Link Base (single) 24-bit 85 MHz
LVDS Display Interface^[56]
3G-SDI (SMPTE 424M)			2006
			1999
HDMI 1.0^[57]			2002
Camera Link full (dual) 64-bit 85 MHz
6G-SDI (SMPTE 2081)			2015
DisplayPort 1.0 (4-lane Reduced Bit Rate)^[58]			2006
			1999
	align=right		align=right		2011
HDMI 1.3^[59]			2006
DisplayPort 1.0 (4-lane High Bit Rate)			2006
12G-SDI (SMPTE 2082)			2015
HDMI 2.0^[60]			2013
	align=right		align=right		2013
DisplayPort 1.2 (4-lane High Bit Rate 2)			2009
DisplayPort 1.3 (4-lane High Bit Rate 3)			2014 (2016)
DisplayPort 1.4/1.4a			2016 (2018)
	align=right		align=right		2015
	align=right		align=right		2015
HDMI 2.1^[61]			2017
DisplayPort 2.0/2.1 (4-lane)^[62]			2019 (2022)
SMPTE 2110 over 100 Gigabit Ethernet	align=right		align=right		2017

Uses 8b/10b encoding (20% coding overhead) Uses 16b/18b encoding (11% overhead) Uses 128b/132b encoding (3% overhead)

See also

• List of Internet access technology bit rates
• Bitrates in multimedia
• Comparison of mobile phone standards
• Comparison of wireless data standards
• OFDM system comparison table
• Optical Carrier transmission rates
• Orders of magnitude (bit rate)
• Sneakernet
• Spectral efficiency comparison table

External links

• Interconnection Speeds Compared
• LTE Categories 1
• LTE Categories 2
• Need for Speed: Theoretical Bandwidth Comparison – A graph illustrating digital bandwidths. Digital Silence, 2004 (archived).

Notes and References

1. https://www.nist.gov/pml/div688/grp40/upload/NIST-Enhanced-WWVB-Broadcast-Format-sept-2012-Radio-Station-staff.pdf NIST-Enhanced-WWVB-Broadcast-Format-sept-2012-Radio-Station-staff
2. http://tf.nist.gov/timefreq/general/pdf/2422.pdf Archived version
3. TTY uses a Baudot code, not ASCII. This uses 5 bits per character instead of 8, plus one start and approx. 1.5 stop bits (7.5 total bits per character sent).
4. Web site: ITU-T Recommendation database.
5. Web site: A Brief History of Captioned Television . www.ncicap.org. dead . https://web.archive.org/web/20110719060406/http://www.ncicap.org/caphist.asp . 19 July 2011.
6. Web site: Human Speech May Have a Universal Transmission Rate: 39 Bits Per Second . 2022-06-24 . 2019-09-04 . science.org . en.
7. Web site: ITU-T Recommendations: V Series: Data communication over the telephone network . ITU.
8. http://www.adam.com.au/about_history.php Adam.com.au
9. Web site: Recommendation G.991.1 (10/98) . ITU.
10. http://www.cablemodem.com/specifications/specifications10.html DOCSIS 1.0
11. http://www.cablemodem.com/specifications/specifications20.html DOCSIS 2.0
12. Web site: G.983.2 . ITU.
13. http://www.cablemodem.com/primer/ DOCSIS 3.0
14. Web site: G.984.4 : Gigabit-capable passive optical networks (G-PON) . ITU.
15. http://www.geek.com/news/docsis-3-1-could-let-cable-companies-compete-with-google-fiber-1575770/ DOCSIS 3.1
16. Web site: G.987 : 10-Gigabit-capable passive optical network (XG-PON) systems . ITU.
17. Web site: G.989 : 40-Gigabit-capable passive optical networks (NG-PON2) . ITU.
18. https://mocalliance.org/news/pr_102207_PQoS_and_175_Mbp.php "MoCA 1.1 improves throughput"
19. InfiniBand FDR-10, FDR and EDR use a 64b/66b encoding scheme.
20. Web site: Lee . Bill . Chair of marketing working group . IBTA Blog . IBTA . 25 June 2018 . infinibandta-blog . https://web.archive.org/web/20180625185215/http://blog.infinibandta.org/2015/12/14/infiniband-roadmap-%E2%80%93-charting-speeds-for-future-needs/ . 2018-06-25 . dead.
21. https://www.mac-history.net/computer-history/2008-05-25/apple-i-and-apple-ii Mac History
22. http://www.vectronicsappleworld.com/profiles/83.html VAW: Apple IIgs Specs
23. Web site: After 35 years of I2C, I3C Improves Capability and Performance Sensors and MEMS. eecatalog.com. 2019-06-26.
24. The Zorro II bus use 4 clocks per 16-Bit of data transferred. See the Zorro III technical specification for more information.
25. [:ja:Cバス|Japan wikipedia article]
26. http://www.controlled.com/std32mg/std32.pdf STD 32 Bus Specification and Designer's Guide
27. [:ja:New Extend Standard Architecture|Japan wikipedia article]
28. https://www.ibm.com/common/ssi/rep_ca/9/877/ENUSZG92-0339/index.html RISC System/6000 POWERstation/POWERserver 580
29. https://books.google.com/books?id=XBvHNQzM2P0C&dq=APbus+MIPS+mhz&pg=PA7 Local Area Networks Newsletter by Paul Polishuk, September 1992, Page 7
30. [:ja:98ローカルバス|Japan wikipedia article]
31. [Dave Haynie]
32. Dave Haynie, designer of the Zorro III bus, states in this posting that Zorro III is an asynchronous bus and therefore does not have a classical MHz rating. A maximum theoretical MHz value may be derived by examining timing constraints detailed in the Zorro III technical specification, which should yield about 37.5 MHz. No existing implementation performs to this level.
33. Dave Haynie, designer of the Zorro III bus, claims in this posting that Zorro III has a max burst rate of 150 MB/s.
34. InfiniBand SDR, DDR and QDR use an 8b/10b encoding scheme.
35. News: Born . Eric . PCIe 4.0 specification finally out with 16 GT/s on tap . 21 February 2018 . Tech Report . 8 June 2017.
36. Web site: PCI-SIG Finalizes PCIe 5.0 Specification: x16 Slots to Reach 64GB/sec . Smith . Ryan . www.anandtech.com . 2019-06-26.
37. Web site: PCI Express 6.0 Specification Finalized: X16 Slots to Reach 128GBps.
38. https://www.intel.com/content/www/us/en/design/technologies-and-topics/low-pin-count-interface-specification.html Intel LPC Interface Specification 1.1
39. Web site: CCOM - Diskettenlaufwerke und Festplatten.
40. FireWire (IEEE 1394b) uses an 8b/10b encoding scheme.
41. News: Dent . Steve . USB 3.2 doubles your connection speeds with the same port . 26 July 2017 . Engadget . 26 July 2017.
42. Web site: VITA - Online store product . 2022-03-23 . www.vita.com.
43. Web site: USB4 Specification Announced: Adopting Thunderbolt 3 Protocol for 40 Gbps USB . Shilov . Anton . www.anandtech.com . 2019-06-26.
44. USB Promoter Group Announces USB4® Version 2.0 . www.businesswire.com . September 2022 . 2022-09-01.
45. Web site: RDRAM Memory Architecture.
46. [Comparison of AMD graphics processing units]
47. [Comparison of Nvidia graphics processing units]
48. Web site: GRAPHICS DOUBLE DATA RATE (GDDR5) SGRAM STANDARD JESD212C . JEDEC . 2016-02-01 . 2016-08-10.
49. Web site: GRAPHICS DOUBLE DATA RATE (GDDR5X) SGRAM STANDARD JESD232 . JEDEC . 2015-11-01 . 2016-08-10.
50. Web site: Doubling I/O Performance with PAM4 - Micron Innovates GDDR6X to Accelerate Graphics Memory . Micron . 11 September 2020.
51. News: Shilov . Anton . JEDEC Publishes HBM2 Specification . 16 May 2017 . Anandtech . 20 January 2016.
52. News: Harding . Scharon . What Are HBM, HBM2 and HBM2E? A Basic Definition. 4 May 2022 . Tom's Hardware. 15 April 2021.
53. News: Prickett Morgan . Timothy . The HBM3 roadmap is just getting started. 4 May 2022 . TheNextPlatform . 6 April 2022.
54. News: Prickett Morgan . Timothy . The HBM3 roadmap is just getting started. 4 May 2022 . TheNextPlatform . 6 April 2022.
55. https://www.intel.com.au/content/dam/www/public/us/en/documents/product-specifications/high-definition-audio-specification.pdf High Definition Audio Specification
56. http://www.videsignline.com/208403647;jsessionid=OD1LDTBAAOB4EQSNDLQCKH0CJUNN2JVN?printableArticle=true Videsignline.com
57. Web site: HDMI 1.3. What you need to know.htm . Octavainc.com . 2008-10-20 . dead . https://web.archive.org/web/20081205081432/http://www.octavainc.com/HDMI%201.3.htm . 2008-12-05.
58. http://www.displayport.org/cms/sites/default/files/downloads/DisplayPort_Technical_Overview.pdf Displayport Technical Overview
59. Web site: HDMI.org . 2008-10-20 . 2018-02-22 . https://web.archive.org/web/20180222200543/https://www.hdmi.org/learningcenter/faq.aspx#12 . dead.
60. Web site: HDMI.org . 2013-11-07 . 2019-01-05 . https://web.archive.org/web/20190105180631/https://www.hdmi.org/manufacturer/hdmi_2_0/hdmi_2_0_faq.aspx#119 . dead.
61. Web site: HDMI.org . 2017-01-10 . 2017-01-06 . https://web.archive.org/web/20170106195344/http://www.hdmi.org/manufacturer/hdmi_2_1/index.aspx . dead.
62. Web site: VESA Releases DisplayPort 2.1 Specification . 17 October 2022 . 2023-01-19 . 2022-11-23 . https://web.archive.org/web/20221123210847/https://vesa.org/featured-articles/vesa-releases-displayport-2-1-specification/.