TO-3 explained

In electronics, TO-3 is a designation for a standardized metal semiconductor package used for power semiconductors, including transistors, silicon controlled rectifiers, and, integrated circuits. TO stands for "Transistor Outline" and relates to a series of technical drawings produced by JEDEC.

The TO-3 case has a flat surface which can be attached to a heatsink, normally via a thermally conductive but electrically insulating washer. The design originated at Motorola around 1955 from a group headed by Dr. Virgil E. Bottom.[1] who was director of research of the Motorola Semiconductor Division. The first use of this design was for the germanium alloy-junction power transistor 2N176 – the first power transistor to be put into quantity production.[1] [2] The lead spacing was originally intended to allow plugging the device into a then-common tube socket.[3]

Typical applications

The metal package can be attached to a heat sink, making it suitable for devices dissipating several watts of heat. Thermal compound is used to improve heat transfer between the device case and the heat sink. Since the device case is one of the electrical connections, an insulator may be required to electrically isolate the component from the heatsink. Insulating washers may be made of mica or other materials with good thermal conductivity.

The case is used with high-power and high-current devices, on the order of a few tens of amperes current and up to a hundred watts of heat dissipation. The case surfaces are metal for good heat conductivity and durability. The metal-to-metal and metal-to-glass joints provide hermetic seals that protect the semiconductor from liquids and gases.

Compared with equivalent plastic packages, the TO-3 is more costly. The spacing and dimensions of the case leads make it unsuitable for higher frequency (radio frequency) devices.

Construction

The semiconductor die component is mounted on a raised platform on a metal plate, with the metal can welded on top of it; providing high heat conductivity and durability. The metal case is connected to the internal device and the leads are connected to the die with bonding wires.

The TO-3 package consists of a diamond-shaped base plate with diagonals of 40.13mm and 27.17mm. The plate has two mounting holes on the long diagonal, with the centers spaced 30.15mm apart.[4] The cap attached to one side of the plate brings the total height to up to 11.43mm. Two pins on the other side of the plate are isolated from the package by individual glass-metal seals. The metal case forms the third connection (in the case of a bipolar junction transistor this is typically the collector).

Dimensions

Variants

TO-3 package variants for integrated circuits can have more than two leads. The height of the cap and the thickness of the leads differs between variants of the TO-3 package.

TO-41

The two pins of the TO-41 package end in soldering pads with holes in them to make it easier to solder wires to the pins for point-to-point construction (as opposed to soldering a TO-3 package on a printed circuit board). Otherwise the TO-41 package has the same dimensions as the TO-3 package.[5] Some variants of the TO-41 package have a third pin with a soldering pad connected to the case (e.g. AD133, AUY21). This 3-pin package was standardized by IEC as C14B/B28.

TO-204

TO-204 is intended to replace previous definitions of flange-mounted packages with a 10.92mm pin spacing.[6] [7] The different outlines are now defined as variants of TO-204: TO-3 is renamed to TO-204-AA, TO-41 to TO-204-AB. A new package with a reduced maximum height of 7.62mm is added as TO-204-AC. Two additional variants specify pins thicker than the original 1.02mm to allow higher currents: 1.27mm for TO-204-AD and 1.52mm for TO-204-AE.

National standards

Standards organizationStandardDesignation for
TO-3TO-41
JEDECJEP95TO-204-AATO-204-ABTO-204-ACTO-204-AD
IECIEC 60191[8] C14A/B18C14B/B18
DINDIN 41872[9] [10] 3A23B2
EIAJ / JEITAED-7500A[11] TC-3/TB-3TC-3A/TB-3
British StandardsBS 3934[12] [13] SO-5A/SB2-2SO-5B/SB2-2
GosstandartGOST 18472—88[14] KT-9KT-9B
RosstandartGOST R 57439[15] KT-9C
Kombinat Mikroelektronik ErfurtTGL 11811[16] EebEea
TGL 26713/11L2A2L2A1

Common components in a TO-3 package

Common voltage regulator integrated circuits:

Common transistors:

See also

External links

Notes and References

  1. Book: Bottom, Virgil . FROM POSSUM HOLLER TO SINGAPORE The Autobiography of VIRGIL E. BOTTOM. November 1992 . Self published . 177 . https://web.archive.org/web/20160315010403/http://www.ieee-uffc.org/main/history-bottombio.asp . 2016-03-15 . 2022-08-22 . XIII Phoenix 1953–1958 . http://www.ieee-uffc.org/main/history/Bottom/chapter13.doc . DOC.
  2. Web site: Motorola 2N176 . Jack . Ward . 2007 . www.semiconductormuseum.com . 2022-08-22.
  3. Web site: Greenburg. Ralph. 2008. Transistor Museum Oral History. 2021-07-14. www.semiconductormuseum.com.
  4. Web site: Mounting Considerations for TO-3 Packages . 3 . Hubert Biagi . Burr-Brown . 2021-06-30.
  5. Web site: TO-41 . JEDEC . https://web.archive.org/web/20160410010353/http://www.jedec.org/sites/default/files/docs/archive/to/to-041.pdf . 2016-04-10 . 2021-06-21.
  6. Book: JEDEC Publication No. 95 . Index by Device Type of Registered Transistor Outlines (TO) . JEDEC . October 2010 . 2021-07-13.
  7. Book: JEDEC Publication No. 95 . registration . Flange Mounted Header Family 0.430 Pin Spacing . JEDEC . 174–177 . November 1982 . 2021-07-13.
  8. Web site: Semiconductors . . 1978 . 2021-06-17.
  9. Web site: NPN Transistor for Powerful AF Output Stages 2N3055 . Siemens . 2021-08-20.
  10. Web site: Silicon NPN Power Transistor BU546 . Telefunken . 2021-08-20.
  11. Web site: EIAJ ED-7500A Standards for the Dimensions of Semiconductor Devices . JEITA . 1996 . 2021-06-14.
  12. Web site: Semiconductor and Photoelectric Devices . Mullard . 1968 . 539 . 2021-06-14.
  13. Web site: Mullard Technical Handbook Book 1 Part 1 . Mullard . 1974 . 516 . 2021-06-14.
  14. Web site: ГОСТ 18472—88 ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры . GOST 18472—88 Semiconductor devices - basic dimensions . ru . Rosstandart . 1988 . 42 . 2021-06-17.
  15. Web site: ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры . Semiconductor devices - basic dimensions . ru . Rosstandart . 2017 . 50–52 . 2021-06-17.
  16. Web site: TGL 26713/11: Gehäuse für Halbleiterbauelemente - Bauform L . Verlag für Standardisierung . Leipzig . June 1988 . de . 2021-06-15.
  17. Book: Kluwers Internationale Transistor Gids . 1991 . Kluwer Technische Boeken B.V. . 9020125192 . 55 . 4.