Srimanta Baishya Explained

Srimanta Baishya
Nationality:Indian
Alma Mater:Jadavpur University
Discipline:Electronics and Communications Engineering
Workplaces:Jadavpur University

Srimanta Baishya is an Indian academician and Professor at the National Institute of Technology Silchar in the Department of Electronics and Communications Engineering.[1] He earned his B.E. in electrical engineering from Assam Engineering College in Guwahati, followed by an M.Tech. in electrical engineering from the Indian Institute of Technology Kanpur. Baishya further pursued his Ph.D. in MOS Modeling from Jadavpur University in Kolkata. Presently, he serves as a professor at NIT Silchar, focusing on research areas such as MOS physics, modeling, and MEMS.[2] [3]

Career

In his tenure at NIT Silchar, he has held prominent administrative positions, including the Dean of Academics, Dean of Research & Consultancy, and the Head of the department.[4] [5]

Selected bibliography

Selected articles

Notes and References

  1. Web site: Srimanta Baishya . 2023-09-17 . scholar.google.com.
  2. Web site: Prof. Srimanta Baishya . 2023-09-17 . en-US.
  3. Web site: Vidwan Profile Page . 2023-09-17 . vidwan.inflibnet.ac.in.
  4. Web site: National Institute of Technology, Silchar . https://web.archive.org/web/20230417041303/https://josaa.admissions.nic.in/seatinfo/root/InstProfile.aspx?instcd=224. 17 Apr 2023. 2023-09-17 . josaa.admissions.nic.in.
  5. Web site: INDIAN RESEARCH INFORMATION NETWORK SYSTEM . 2023-09-17 . irins.inflibnet.ac.in . en.
  6. Baishya . Srimanta . Mallik . Abhijit . Sarkar . Chandan Kumar . 2008-01-01 . A threshold voltage model for short-channel MOSFETs taking into account the varying depth of channel depletion layers around the source and drain . Microelectronics Reliability . 48 . 1 . 17–22 . 10.1016/j.microrel.2007.01.086 . 0026-2714.
  7. Baishya . S. . Mallik . A. . Sarkar . C. K. . September 2007 . A Pseudo Two-Dimensional Subthreshold Surface Potential Model for Dual-Material Gate MOSFETs . IEEE Transactions on Electron Devices . 54 . 9 . 2520–2525 . 10.1109/TED.2007.903204 . 1557-9646.
  8. Baishya . S . Mallik . A . Sarkar . C K . 2007-09-01 . A surface potential based subthreshold drain current model for short-channel MOS transistors . Semiconductor Science and Technology . 22 . 9 . 1066–1069 . 10.1088/0268-1242/22/9/015 . 0268-1242.
  9. Baishya . Srimanta . Mallik . Abhijit . Sarkar . Chandan Kumar . 2007-04-01 . Subthreshold surface potential and drain current models for short-channel pocket-implanted MOSFETs . Microelectronic Engineering . 84 . 4 . 653–662 . 10.1016/j.mee.2006.12.008 . 0167-9317.
  10. Baishya . S. . Mallik . A. . Sarkar . C.K. . March 2006 . A subthreshold surface potential model for short-channel MOSFET taking into account the varying depth of channel depletion layer due to source and drain junctions . IEEE Transactions on Electron Devices . 53 . 3 . 507–514 . 10.1109/TED.2005.864364 . 1557-9646.