Program status word explained

The program status word (PSW) is a register that performs the function of a status register and program counter, and sometimes more. The term is also applied to a copy of the PSW in storage. This article only discusses the PSW in the IBM System/360 and its successors, and follows the IBM convention of numbering bits starting with 0 as the leftmost (most significant) bit.

Although certain fields within the PSW may be tested or set by using non-privileged instructions, testing or setting the remaining fields may only be accomplished by using privileged instructions.

Contained within the PSW are the two bit condition code, representing zero, positive, negative, overflow, and similar flags of other architectures' status registers. Conditional branch instructions test this encoded as a four bit value, with each bit representing a test of one of the four condition code values, 23 + 22 + 21 + 20. (Since IBM uses big-endian bit numbering, mask value 8 selects code 0, mask value 4 selects code 1, mask value 2 selects code 2, and mask value 1 selects code 3.)

The 64-bit PSW describes (among other things)

In the early instances of the architecture (System/360 and early System/370), the instruction address was 24 bits; in later instances (XA/370), the instruction address was 31 bits plus a mode bit (24 bit addressing mode if zero; 31 bit addressing mode if one) for a total of 32 bits.

In the present instances of the architecture (z/Architecture), the instruction address is 64 bits and the PSW itself is 128 bits.

The PSW may be loaded by the LOAD PSW instruction (LPSW or LPSWE). Its contents may be examined with the Extract PSW instruction (EPSW).

Format

S/360

On all but 360/20, the PSW has the following formats. S/360 Extended PSW format only applies to the 360/67 with bit 8 of control register 6 set.

IBM S/360 PSW formats
S/360 Standard PSW

System MaskKeyAMWPInterruption Code
0<-- 1 --><-- 2 --><-- 3 --><-- 4 --><-- 5 --><-- 6 -->78<-- 9 --><-- 10 -->111213141516<-- 17 --><-- 18 --><-- 19 --><-- 20 --><-- 21 --><-- 22 --><-- 23 --><-- 24 --><-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

ILCCCProgram
Mask
Instruction Address
3233343536<-- 37 --><-- 38 -->3940<-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
0-7SM
! Bit! Meaning
0Channel 0 mask
1Channel 1 mask
2Channel 2 mask
3Channel 3 mask
4Channel 4 mask
5Channel 5 mask
6Channel 6 mask
7External Mask
8-11KeyPSW key
12AASCII
13MMachine-check mask
14WWait state
15PProblem state
16-31ICInterruption Code
32-33ILCInstruction-Length Code
34-35CCCondition Code
36-39PM
! Bit! Meaning
36Fixed-point overflow
37Decimal overflow
38Exponent underflow
39Significance
40-63IAInstruction Address
S/360 Extended PSW

spare24/32
Bit
Mode
Tran
Ctrl
I/O
Mask
Ext.
Mask
KeyAMWPILCCCProgram
Mask
spare
0<-- 1 --><-- 2 -->345678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->2324<-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

Instruction Address
32<-- 33 --><-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 --><-- 39 --><-- 40 --><-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
0-3Spare (must be 0)
424/32-bit Address mode
5Translation Control
6IOI/O Mask (Summary)
7EXExternal Mask (Summary)
8-11KeyProtection Key
12AASCII
13MMachine-check mask
14WWait state
15PProblem state
16-17ILCInstruction-Length Code
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22Exponent underflow
23Significance
24-31Spare
32-63IAInstruction Address

S/370

IBM S/370 PSW formats
S/370 Basic Control mode PSW

Chan.
Mask
I
O
E
X
Key0MWPInterruption Code
012<-- 3 -->45678<-- 9 --><-- 10 -->111213141516<-- 17 --><-- 18 --><-- 19 --><-- 20 --><-- 21 --><-- 22 --><-- 23 --><-- 24 --><-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

ILCCCProgram
Mask
Instruction Address
3233343536<-- 37 --><-- 38 -->3940<-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
0-5Channel Masks for channels 0-5
6IOI/O Mask for channels > 5
7EXExternal Mask
8-11KeyPSW key
12E=0Basic Control mode
13MMachine-check mask
14WWait state
15PProblem state
16-31ICInterruption Code
32-33ILCInstruction-Length Code
34-35CCCondition Code
36-39PM
! Bit! Meaning
36Fixed-point overflow
37Decimal overflow
38Exponent underflow
39Significance
40-63IAInstruction Address
S/370 Extended Control mode PSW

0R000TI
O
E
X
Key1MWPS0CCProgram
Mask
00000000
012<-- 3 -->45678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->2324<-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

00000000Instruction Address
32<-- 33 --><-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 -->3940<-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O Mask; subject to channel mask in CR2
7EXExternal Mask; subject to external subclass mask in CR0
8-11KeyPSW key
12E=1Extended Control mode
13MMachine-check mask
14WWait state
15PProblem state
16SAddress-Space Control
0=primary-space mode
1=Secondary-space mode
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22Exponent underflow
23Significance
40-63IAInstruction Address

S/370 Extended Architecture (S/370-XA)

IBM Extended Architecture (XA) PSW format
Extended Architecture Extended Control mode PSW

0R000TI
O
E
X
Key1MWPS0CCProgram
Mask
00000000
012<-- 3 -->45678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->2324<-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

AInstruction Address
3233<-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 --><-- 39 --><-- 40 --><-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O Mask; subject to channel mask in CR2
7EXExternal Mask; subject to external subclass mask in CR0
8-11KeyPSW key
12E=1Extended Control mode
13MMachine-check mask
14WWait state
15PProblem state
16SAddress-Space Control
0=primary-space mode
1=Secondary-space mode
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22Exponent underflow
23Significance
32AAddressing mode
0=24 bit; 1=31 bit
33-63IAInstruction Address

Enterprise Systems Architecture (ESA)

IBM Enterprise Systems Architecture (ESA) PSW format
Enterprise Systems Architecture Extended Control mode PSW

0R000TI
O
E
X
Key1MWPASCCProgram
Mask
00000000
012<-- 3 -->45678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->2324<-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 --><-- 30 -->31

AInstruction Address
3233<-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 --><-- 39 --><-- 40 --><-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O Mask; subject to channel mask in CR2
7EXExternal Mask; subject to external subclass mask in CR0
8-11KeyPSW key
12E=1Extended Control mode
13MMachine-check mask
14WWait state
15PProblem state
16-17ASAddress-Space Control
00=primary-space mode
01=Access-register mode
10=Secondary-space mode
11=Home-space mode
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22Exponent underflow
23Significance
32AAddressing mode
0=24 bit; 1=31 bit
33-63IAInstruction Address

z/Architecture

IBM z/Architecture PSW formats
z/Architecture long PSW

0R000TI
O
E
X
Key0MWPASCCProgram
Mask
R
I
000000E
A
012<-- 3 -->45678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->2324<-- 25 --><-- 26 --><-- 27 --><-- 28 --><-- 29 -->3031

B
A
0
3233<-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 --><-- 39 --><-- 40 --><-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63

Instruction Address
64<-- 65 --><-- 66 --><-- 67 --><-- 68 --><-- 69 --><-- 70 --><-- 71 --><-- 72 --><-- 73 --><-- 74 --><-- 75 --><-- 76 --><-- 77 --><-- 78 --><-- 79 --><-- 80 --><-- 81 --><-- 82 --><-- 83 --><-- 84 --><-- 85 --><-- 86 --><-- 87 --><-- 88 --><-- 89 --><-- 90 --><-- 91 --><-- 92 --><-- 93 --><-- 94 -->95

Instruction Address (Continued)
96<-- 97 --><-- 98 --><-- 99 --><-- 100 --><-- 101 --><-- 102 --><-- 103 --><-- 104 --><-- 105 --><-- 106 --><-- 107 --><-- 108 --><-- 109 --><-- 110 --><-- 111 --><-- 112 --><-- 113 --><-- 114 --><-- 115 --><-- 116 --><-- 117 --><-- 118 --><-- 119 --><-- 120 --><-- 121 --><-- 122 --><-- 123 --><-- 124 --><-- 125 --><-- 126 -->127
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O mask
7EXExternal Mask
8-11KeyPSW key
12E=0Must be zero for LPSWE
13MMachine-check mask
14WWait state
15PProblem state
16-17ASAddress-Space Control
00=primary-space mode
01=Access-register mode
10=Secondary-space mode
11=Home-space mode
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22HFP Exponent underflow
23HFP Significance
24RIReserved for IBM
31EAExtended Addressing mode
0=defined by BA below; 1=64-bit, BA must be zero
32BABasic Addressing mode
0=24 or 64; 1=31
64-127IAInstruction Address
z/Architecture short PSW

0R000TI
O
E
X
Key1MWPASCCProgram
Mask
R
I
000000E
A
012<-- 3 -->45678<-- 9 --><-- 10 -->11121314151617181920<-- 21 --><-- 22 -->232425<-- 26 --><-- 27 --><-- 28 --><-- 29 -->3031

B
A
Instruction Address
3233<-- 34 --><-- 35 --><-- 36 --><-- 37 --><-- 38 --><-- 39 --><-- 40 --><-- 41 --><-- 42 --><-- 43 --><-- 44 --><-- 45 --><-- 46 --><-- 47 --><-- 48 --><-- 49 --><-- 50 --><-- 51 --><-- 52 --><-- 53 --><-- 54 --><-- 55 --><-- 56 --><-- 57 --><-- 58 --><-- 59 --><-- 60 --><-- 61 --><-- 62 -->63
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O mask
7EXExternal Mask
8-11KeyPSW key
12E=1Must be one for LPSW
13MMachine-check mask
14WWait state
15PProblem state
16-17ASAddress-Space Control
00=primary-space mode
01=Access-register mode
10=Secondary-space mode
11=Home-space mode
18-19CCCondition Code
20-23PM
! Bit! Meaning
20Fixed-point overflow
21Decimal overflow
22HFP Exponent underflow
23HFP Significance
24RIReserved for IBM
31EAExtended Addressing mode
0=defined by BA below; 1=64-bit, BA must be zero
32BABasic Addressing mode
0=24 or 64; 1=31
33-63IAInstruction Address

References

S360
  • IBM System/360 Principles of Operation . Eighth . September 1968 . A22-6821-7 . . IBM .
    func67
  • IBM System/360 Model 67 Functional Characteristics . GA27-2719-2 . February 1972 . Third . . IBM .
    S370
  • IBM System/370 Principles of Operation . A22-7000-10 . September 1987 . Eleventh . . IBM .
    S370-XA
  • IBM System/370 Extended Architecture Principles of Operation . SA22-7085-1 . January 1987 . Second . . IBM .
    S370-ESA
  • IBM Enterprise Systems Architecture/370 Principles of Operation . SA22-7200-0 . August 1988 . First . . IBM .
    z
  • z/Architecture Principles of Operation . Fourteenth . May 2022 . SA22-7832-13 . . IBM .