POWER8 explained

POWER8
Produced-Start:2014
Slowest:2.5
Slow-Unit:GHz
Fastest:5
Fast-Unit:GHz
Size-From:22 nm
Designfirm:IBM
Arch:Power ISA (Power ISA v.2.07)
Numcores:6 or 12
L1cache:64+32 KB per core
L2cache:512 KB per core
L3cache:8 MB per chiplet
L4cache:16 MB per Centaur
Predecessor:POWER7
Successor:POWER9

POWER8 is a family of superscalar multi-core microprocessors based on the Power ISA, announced in August 2013 at the Hot Chips conference. The designs are available for licensing under the OpenPOWER Foundation, which is the first time for such availability of IBM's highest-end processors.[1] [2]

Systems based on POWER8 became available from IBM in June 2014.[3] Systems and POWER8 processor designs made by other OpenPOWER members were available in early 2015.

Design

POWER8 is designed to be a massively multithreaded chip, with each of its cores capable of handling eight hardware threads simultaneously, for a total of 96 threads executed simultaneously on a 12-core chip. The processor makes use of very large amounts of on- and off-chip eDRAM caches, and on-chip memory controllers enable very high bandwidth to memory and system I/O. For most workloads, the chip is said to perform two to three times as fast as its predecessor, the POWER7.[4]

POWER8 chips comes in 6- or 12-core variants;[5] each version is fabricated in a 22 nm silicon on insulator (SOI) process using 15 metal layers. The 12-core version consists of 4.2 billion transistors[6] and is 650 mm2 large while the 6-core version is only 362 mm2 large. However the 6- and 12-core variants can have all or just some cores active, so POWER8 processors come with 4, 6, 8, 10 or 12 cores activated.

CAPI

See main article: Coherent Accelerator Processor Interface.

Where previous POWER processors use the GX++ bus for external communication, POWER8 removes this from the design and replaces it with the CAPI port (Coherent Accelerator Processor Interface) that is layered on top of PCI Express 3.0. The CAPI port is used to connect auxiliary specialized processors such as GPUs, ASICs and FPGAs.[7] [8] Units attached to the CAPI bus can use the same memory address space as the CPU, thereby reducing the computing path length. At the 2013 ACM/IEEE Supercomputing Conference, IBM and Nvidia announced an engineering partnership to closely couple POWER8 with Nvidia GPUs in future HPC systems,[9] with the first of them announced as the Power Systems S824L.

On October 14, 2016, IBM announced the formation of OpenCAPI, a new organization to spread adoption of CAPI to other platforms. Initial members are Google, AMD, Xilinx, Micron and Mellanox.[10]

OCC

POWER8 also contains a so-called on-chip controller (OCC), which is a power and thermal management microcontroller based on a PowerPC 405 processor. It has two general-purpose offload engines (GPEs) and 512 KB of embedded static RAM (SRAM) (1 KB = 1024 bytes), together with the possibility to access the main memory directly, while running an open-source firmware. OCC manages POWER8's operating frequency, voltage, memory bandwidth, and thermal control for both the processor and memory; it can regulate voltages through 1,764 integrated voltage regulators (IVRs) on the fly. Also, the OCC can be programmed to overclock the POWER8 processor, or to lower its power consumption by reducing the operating frequency (which is similar to the configurable TDP found in some of the Intel and AMD processors).[11] [12] [13] [14]

Memory Buffer chip

POWER8 splits the memory controller functions by moving some of them away from the processor and closer to the memory. The scheduling logic, the memory energy management, and the RAS decision point are moved to a so-called Memory Buffer chip (a.k.a. Centaur).[15] Offloading certain memory processes to the Memory Buffer chip enables memory access optimizations, saving bandwidth and allowing for faster processor to memory communication.[16] It also contains caching structures for an additional 16 MB of L4 cache per chip (up to 128 MB per processor) (1 MB = 1024 KB). Depending on the system architecture the Memory Buffer chips are placed either on the memory modules (Custom DIMM/CDIMM, for example in S824 and E880 models), or on the memory riser card holding standard DIMMs (for example in S822LC models).[17]

The Memory Buffer chip is connected to the processor using a high-speed multi-lane serial link. The memory channel connecting each buffer chip is capable of writing 2 bytes and reading 1 byte at a time. It runs at 8 GB/s in the early Entry models,[16] later increased in the high-end and the HPC models to 9.6 GB/s with a 40-ns latency,[17] [18] [19] for a sustained bandwidth of 24 GB/s and 28.8 GB/s per channel respectively. Each processor has two memory controllers with four memory channels each, and the maximum processor to memory buffer bandwidth is 230.4 GB/s per processor. Depending on the model only one controller might be enabled,[16] or only two channels per controller could be in use.[17] For increased availability the link provides "on-the-fly" lane isolation and repair.[15]

Each Memory Buffer chip has four interfaces allowing to use either DDR3 or DDR4 memory at 1600 MHz with no change to the processor link interface. The resulting 32 memory channels per processor allow peak access rate of 409.6 GB/s between the Memory Buffer chips and the DRAM banks. Initially support was limited to 16 GB, 32 GB and 64 GB DIMMs, allowing up to 1 TB to be addressed by the processor. Later support for 128 GB and 256 GB DIMMs was announced,[18] [20] allowing up to 4 TB per processor.

Specifications

The POWER8[21] [22] core has 64 KB L1 data cache contained in the load-store unit and 32 KB L1 instruction cache contained in the instruction fetch unit, along with a tightly integrated 512 KB L2 cache. In a single cycle each core can fetch up to eight instructions, decode and dispatch up to eight instructions, issue and execute up to ten instructions and commit up to eight instructions.[23]

Each POWER8 core consist of primarily the following six execution units:

Each core has sixteen execution pipelines:

It has a larger issue queue with 4×16 entries, improved branch predictors and can handle twice as many cache misses. Each core is eight-way hardware multithreaded and can be dynamically and automatically partitioned to have either one, two, four or all eight threads active. POWER8 also added support for hardware transactional memory.[25] [26] [27] IBM estimates that each core is 1.6 times as fast as the POWER7 in single-threaded operations.

A POWER8 processor is a 6- or 12-chiplet design with variants of either 4, 6, 8, 10 or 12 activated chiplets, in which one chiplet consists of one processing core, 512 KB of SRAM L2 cache on a 64-byte wide bus (which is twice as wide as on its predecessor), and 8 MB of L3 eDRAM cache per chiplet shareable among all chiplets.[28] Thus, a six-chiplet processor would have 48 MB of L3 eDRAM cache, while a 12-chiplet processor would have a total of 96 MB of L3 eDRAM cache. The chip can also utilize an up to 128 MB of off-chip eDRAM L4 cache using Centaur companion chips. The on-chip memory controllers can handle 1 TB of RAM and 230 GB/s sustained memory bandwidth. The on-board PCI Express controllers can handle 48 GB/s of I/O to other parts of the system. The cores are designed to operate at clock rates between 2.5 and 5 GHz.

The six-core chips are mounted in pairs on dual-chip modules (DCM) in IBM's scale out servers. In most configurations not all cores are active, resulting in a variety of configurations where the actual core count differs. The 12-core version is used in the high-end E880 and E880C models.

IBM's single-chip POWER8 module is called Turismo[29] and the dual-chip variant is called Murano.[30] PowerCore's modified version is called CP1.

POWER8 with NVLink

This is a revised version of the original 12-core POWER8 from IBM, and used to be called POWER8+. The main new feature is that it has support for Nvidia's bus technology NVLink, connecting up to four NVLink devices directly to the chip. IBM removed the A Bus and PCI interfaces for SMP connections to other POWER8 sockets and replaced them with NVLink interfaces. Connection to a second CPU socket are now provided via the X Bus. Besides that and a slight size increase to 659 mm2, the differences seem minimal compared to previous POWER8 processors.[31] [32] [33] [34]

Licensees

On 19 January 2014, the Suzhou PowerCore Technology Company announced that they will join the OpenPOWER Foundation and license the POWER8 core to design custom-made processors for use in big data and cloud computing applications.[35] [36]

Variants

Systems

IBM
  • Scale Out servers, supporting one or two sockets each carrying a dual-chip module with two six-core POWER8 processors. They come in either 2U or 4U form factors, and one tower configuration. The "L" versions run only Linux, while the others run AIX, IBM i and Linux. The "LC" versions are built by OpenPOWER partners.[39] [40] [41]

    Enterprise servers, supporting nodes with four sockets, each carrying 8-, 10- or 12-core modules, for a maximum of 16 sockets, 128 cores and 16 TB of RAM. These machines can run AIX, IBM i, or Linux.

    High performance computing:

    Hardware Management Console

    Tyan
    Google
  • Google has shown a motherboard with two sockets, intended for internal use only.[50] [51]
    StackVelocity
  • StackVelocity has designed a high-performance reference platform, Saba.
    Inspur
  • Inspur has made a deal with IBM to develop server hardware based on POWER8 and related technologies.[52] [53]
    Cirrascale
  • RM4950 4U, 4-core POWER8 SCM with four Nvidia Tesla K40 accelerators. Based on Tyan's motherboard.[55]
    Zoom Netcom
  • RedPOWER C210 and C220 2U and 4U servers with two POWER8 sockets and 64 sockets for RAM modules.[56]
  • RedPOWER C310 and C320 2U and 4U servers with two CP1 sockets.
    ChuangHe
  • OP-1X 1U, single socket, 32 RAM slots.[57]
    Rackspace
  • Barreleye 1U, 2 socket, 32 RAM slots. Based on the Open Compute Project platform for use in their OnMetal service.[58] [59] [60]
    Raptor Computing Systems / Raptor Engineering
  • Talos I unreleased 4U server or workstation, 1 socket, 8 RAM slots.[61]
    Penguin Computing
  • Magna product series[62] [63]

    See also

    External links

    Notes and References

    1. Web site: You won't find this in your phone: A 4GHz 12-core Power8 for badass boxes. The Register.
    2. Web site: POWER8 Processor User's Manual for the Single-Chip Module. March 16, 2016. IBM.
    3. Web site: IBM POWER8 - Announce / Availability Plans . 2014-05-23 . https://web.archive.org/web/20140524004044/http://komplex-it.dk/media/128719/ibm_power8.pdf . 2014-05-24 . dead .
    4. Web site: IBM's Watson could get even smarter with Power8 chip. idgconnect.com. 17 December 2014. https://web.archive.org/web/20141227113221/http://www.idgconnect.com/abstract/3292/ibm-watson-smarter-power8-chip. 2014-12-27. dead.
    5. Web site: IBM Power System S814. 17 December 2014.
    6. POWER8: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth. 2014 IEEE International Solid-State Circuits Conference. 10.1109/ISSCC.2014.6757353. 32988422.
    7. Web site: IBM's new Power8 doubles performance of Watson chip. Agam Shah. 17 December 2014. PC World. 17 December 2014.
    8. Web site: IBM Power8 Processor Detailed - Features 22nm Design With 12 Cores, 96 MB eDRAM L3 Cache and 4 GHz Clock Speed. WCCFtech. 27 August 2013 . 17 December 2014.
    9. Web site: Nvidia Unveils Tesla K40 Accelerator And Strategic Partnership With IBM . Altavilla . Dave . 18 November 2013 . . 18 November 2013.
    10. News: OpenCAPI Unveiled: AMD, IBM, Google, Xilinx, Micron and Mellanox Join Forces in the Heterogenous Computing Era. Gelas. Johan De. 2016-10-17.
    11. Web site: OCC Firmware Code is Now Open Source . 2014-12-20 . 2014-12-27 . Todd Rosedahl . openpowerfoundation.org . https://web.archive.org/web/20141227113143/http://openpowerfoundation.org/press-releases/occ-firmware-code-is-now-open-source/ . 2014-12-27 . dead.
    12. Web site: open-power/docs: OCC Overview . 2014-12-09 . 2014-12-27 . GitHub.
    13. Web site: Semiconductor Engineering .:. The Good Kind Of Regulation. 13 March 2014 . 17 December 2014.
    14. Web site: ISSCC 2014 - IBM dévoile le Power8. Frédéric Rémond. French. 17 December 2014.
    15. Web site: Intro to POWER8 Processor. . 22. https://web.archive.org/web/20180506104235/https://www.ibm.com/developerworks/community/wikis/form/anonymous/api/wiki/61ad9cf2-c6a3-4d2c-b779-61ff0266d32a/page/f1abe75a-a2b2-43dd-9d75-7dae28f5bc5f/attachment/0b9be9c6-1d2b-44dc-9630-384f47734c94/media/2014-01%20Intro%20to%20POWER8%20Process. 2018-05-06. dead.
    16. Book: IBM Power System S822 Technical Overview and Introduction (REDP-5102-00). 30 September 2016 .
    17. Book: IBM Power System S822LC Technical Overview and Introduction (REDP-5283-00). 30 September 2016 .
    18. Book: IBM Power Systems E870 and E880 Technical Overview and Introduction (REDP-5137-00). 30 September 2016 .
    19. Book: Implementing an IBM InfoSphere BigInsights Cluster using Linux on Power. 30 September 2016 . SG24-8248-00.
    20. Web site: IBM Europe, Middle East, and Africa Hardware Announcement ZG14-0279, IBM Power Systems I/O enhancements (RPQ 8A2232). .
    21. Web site: POWER8. Jeff Stuecheli. https://web.archive.org/web/20140202205102/http://www.hotchips.org/wp-content/uploads/hc_archives/hc25/HC25.20-Processors1-epub/HC25.26.210-POWER-Studecheli-IBM.pdf. 2014-02-02. dead.
    22. Web site: Performance Characteristics of the POWER8 Processor. Alex Mericas. https://web.archive.org/web/20150420083843/http://www.hotchips.org/wp-content/uploads/hc_archives/hc26/HC26-12-day2-epub/HC26.12-8-Big-Iron-Servers-epub/HC26.12.817-POWER8-Mericas-IBM%20Revised-no-spec.pdf. 2015-04-20. dead.
    23. IBM POWER8 processor core microarchitecture. IBM Journal of Research and Development. 59. 2:1–2:21. 10.1147/JRD.2014.2376112. 2015. Sinharoy. B.. Van Norstrand. J. A.. Eickemeyer. R. J.. Le. H. Q.. Leenstra. J.. Nguyen. D. Q.. Konigsburg. B.. Ward. K.. Brown. M. D.. Moreira. J. E.. Levitan. D.. Tung. S.. Hrusecky. D.. Bishop. J. W.. Gschwind. M.. Boersma. M.. Kroener. M.. Kaltenbach. M.. Karkhanis. T.. Fernsler. K. M..
    24. Web site: POWER8 in-core cryptography. Leonidas Barbosa. September 21, 2015. IBM.
    25. Book: Performance Optimization and Tuning Techniques for IBM Processors, including IBM POWER8 . July 2014 . November 2, 2022 . . PDF.
    26. Web site: IBM XL compiler hardware transactional memory built-in functions for IBM AIX on IBM POWER8 processor-based systems . November 18, 2014 . February 8, 2015 . Wei Li . IBM.
    27. Harold W. Cain, Maged M. Michael, Brad Frey, Cathy May, Derek Williams, and Hung Le. "Robust Architectural Support for Transactional Memory in the Power Architecture." In ISCA '13 Proceedings of the 40th Annual International Symposium on Computer Architecture, pp. 225-236, ACM, 2013.
    28. Web site: POWER8 Hardware . Hurlimann . Dan . June 2014 . ibm.com . IBM . 2014-11-05.
    29. Web site: Tyan Ships First Non-IBM Power8 Server. EnterpriseTech. 8 October 2014 . 17 December 2014.
    30. Web site: Power8 Iron To Take On Four-Socket Xeons. nextplatform.com. 2015-05-11.
    31. Web site: OpenPOWER and the Roadmap Ahead – Brad McCredie . 2016-09-09 . 2018-12-28 . https://web.archive.org/web/20181228110125/https://openpowerfoundation.org/wp-content/uploads/2016/04/5_Brad-McCredie.IBM_.pdf . dead .
    32. Web site: IBM Debuts Power8 Chip with NVLink and 3 New Systems. 8 September 2016 .
    33. Web site: Whitepaper - NVIDIA Tesla P100 - The Most Advanced Datacenter Accelerator Ever Built Featuring Pascal GP100, the World's Fastest GPU.
    34. Book: Caldeira. Alexandre Bicas. Haug. Volker. IBM Power System S822LC for High Performance Computing Introduction and Technical Overview. IBM Redpaper. 9780738455617. 2017-09-28.
    35. Web site: IBM News room - 2014-01-19 Suzhou PowerCore Technology Co. Intends To Use IBM POWER Technology For Chip Design That Pushes Innovation In China - United States . 03.ibm.com . 2014-01-22.
    36. Web site: Chris Maxcer and Mel Beckman . Suzhou PowerCore to Start Using IBM POWER Tech for New Chip Design in China . PowerITPro . 2014-01-22.
    37. Web site: OpenPower Collective Opens For System Business. nextplatform.com. 2015-03-20.
    38. Web site: Foundation Unveils Slew of OpenPOWER Firsts. 18 March 2015 .
    39. Web site: IBM Announces POWER8 with OpenPOWER Partners.
    40. Web site: IBM News room - 2014-04-23 IBM Tackles Big Data Challenges with Open Server Innovation Model - United States. 17 December 2014.
    41. Web site: Scale-out Hardware with POWER8 Technology. https://web.archive.org/web/20140523225238/http://www.common.org/webcasts/free/April29_AnnouncementWebcast.pdf. 2014-05-23. dead.
    42. Web site: Refreshed IBM Power Linux Systems Add NVLink. 8 September 2016 .
    43. Web site: IBM Back In HPC With Power Systems LC Clusters. nextplatform.com. 2015-10-08.
    44. Web site: IBM's First OpenPOWER Server Targets HPC Workloads. 20 March 2015 .
    45. Web site: OpenPOWER Foundation Technology Leaders Unveil Hardware Solutions To Deliver New Server Alternatives . 2015-03-21 . 2015-04-02 . https://web.archive.org/web/20150402121102/http://openpowerfoundation.org/press-releases/openpower-foundation-technology-leaders-unveil-hardware-solutions-to-deliver-new-server-alternatives/ . dead .
    46. Web site: IBM's new Power8 server packs in Nvidia's speedy NVLink interconnect.
    47. Web site: HMC 7063-CR1 hardware install (POWER8 based HMC). .
    48. Web site: Tyan OpenPOWER System.
    49. Web site: TYAN Debuts New POWER8-Based 1U Sever at OpenPOWER Summit 2016.
    50. Web site: Inside Google, Tyan Power8 Server Boards. EnterpriseTech. 29 April 2014 . 17 December 2014.
    51. Web site: Today I'm excited to show off a Google POWER8 server motherboard in the…. 17 December 2014.
    52. News: IBM to help China's Inspur to design servers. Reuters. 22 August 2014 . 17 December 2014.
    53. Web site: IBM Sets Aside Rivalry to Partner With China's Inspur. Alex Barinka. 23 August 2014. Bloomberg. 17 December 2014.
    54. Web site: 14 Views of the Open Power Summit.
    55. Web site: Cirrascale RM4950 / Multi-Device POWER8® Development Platform.
    56. Web site: RedPOWER Products page.
    57. Web site: OpenPower Group Puts Initial Hardware Products on Display. Jeff. Burt. March 19, 2015. eWeek.
    58. Web site: OpenPOWER: Opening The Stack, All The Way Down . 2015-03-21 . https://web.archive.org/web/20150430002455/http://www.rackspace.com/blog/openpower-opening-the-stack-all-the-way-down/ . 2015-04-30 . dead .
    59. Web site: Rackspace Building OpenPOWER-Based Open Compute Server. 16 December 2014 .
    60. Web site: Life at the Intersection: OpenPOWER, Open Compute, and the Future of Cloud Software & Infrastructure. https://web.archive.org/web/20150408183452/http://openpowerfoundation.org/blogs/life-at-the-intersection-openpower-open-compute-and-the-future-of-cloud-software-infrastructure/. 2015-04-08. dead.
    61. Web site: Pearson. Timothy. Talos Secure Workstation. Crowd Supply. product description.
    62. News: Shilov. Anton. OpenPOWER Gains Support as Inventec, Inspur, Supermicro Develop POWER8-Based Servers. 16 November 2017. AnandTech. 2016-04-15. en. web.
    63. News: Gelas. Johan De. The OpenPOWER Saga Continues: Can You Get POWER Inside 1U?. 16 November 2017. AnandTech. 2017-02-24. en. web.
    64. Web site: Penguin Magna 2001 datasheet. Penguin Computing.
    65. Web site: Penguin Magna 1015 datasheet. Penguin Computing.
    66. Penguin Computing Announces OpenPOWER Server Platform and Go-To-Market Partner Mark III Systems - Penguin Computing. Penguin Computing. 16 November 2017. Las Vegas. en. 2016-09-19. https://web.archive.org/web/20161020215954/https://www.penguincomputing.com/company/press-releases/penguin-computing-announces-openpower-server-platform-with-partner-mark-iii-systems/. 2016-10-20. dead.
    67. Web site: Penguin Magna 2002 datasheet. Penguin Computing.
    68. Penguin Computing Announces New Magna and Relion Servers with NVIDIA Tesla P100 GPU Accelerators for High Performance Computing. Penguin Computing. 16 November 2017. Freemont, CA. 2016-06-20. https://web.archive.org/web/20170703084955/https://www.penguincomputing.com/company/press-releases/penguin-computing-hpc-magna-relion-servers-with-nvidia-tesla-p100-gpu-accelerators/. 2017-07-03. dead.

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