PCI/104-Express explained

The PCI/104-Express specification establishes a standard to use the high-speed PCI Express bus in embedded applications.^[1] It was developed by the PC/104 Consortium and adopted by member vote in March 2008. PCI Express was chosen because of its market adoption, performance, scalability, and growing silicon availability worldwide. It provides a new high-performance physical interface while retaining software compatibility with the existing PCI infrastructure.

Incorporating the PCI Express bus within the industry proven PC/104 architecture brings many advantages for embedded applications including fast data transfer, low cost due to PC/104’s unique self-stacking bus, high reliability due to PC/104’s inherent ruggedness, and long-term sustainability.

Specification Overview

There are two versions of the specification that are complementary. The main difference is that Type 2 replaces the PCI Express x16 link with SATA, USB 3.0, LPC, and RTC battery.

Both Type 1 and Type 2 have this common feature set and pin assignments:

• Four x1 PCI Express Links
• Two USB 2.0
• ATX power and control signals: +5V Standby, Power supply on, Power OK
• Power: +3.3V, +5V, +12V
• SMBus

Type 1 has the common feature set plus:

• One x16 PCI Express Link, or optionally two x8 Links, two x4 PCI Express Links, or two SDVO

Type 2 has the common feature set plus:

• Two x4 PCI Express Links
• Two USB 3.0
• Two SATA
• LPC Bus
• RTC Battery

See also

• Computer form factor
• Embedded system

External links

• PC/104 Consortium website

Notes and References

1. News: Media . OpenSystems . PC/104 Consortium technical update: Stackable PCs from ISA to PCI to PCI Express . Embedded Computing Design . en.