Nader Bagherzadeh Explained
Nader Bagherzadeh (Persian: نادر باقرزاده) is a professor of computer engineering in the Department of Electrical Engineering and Computer Science at the University of California, Irvine, where he served as a chair from 1998 to 2003. Bagherzadeh has been involved in research and development in the areas of: Computer Architecture, Reconfigurable Computing, VLSI Chip Design, Network-on-Chip, 3D chips, Sensor Networks, Computer Graphics, Memory and Embedded Systems. Bagherzadeh was named Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2014[1] for contributions to the design and analysis of coarse-grained reconfigurable processor architectures. Bagherzadeh has published more than 400 articles in peer-reviewed journals and conferences. He was with AT&T Bell Labs from 1980 to 1984.
Education
Notable works
- MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications [2]
- Design and implementation of the MorphoSys reconfigurable computing processor [3]
- Power-aware scheduling under timing constraints for mission-critical embedded systems [4]
- Optimal Ring Embedding in Hypercubes with Faulty Links
- A scalable register file architecture for dynamically scheduled processors[5]
- A framework for reconfigurable computing: task scheduling and context management [6]
- Performance study of a multithreaded superscalar microprocessor [7]
Awards
- 2014, Khwarizmi International Award (27th Session)[8]
- 2002, Best paper award in IEEE Transactions on VLSI Design (TVLSI)
- 2002, Best paper award in the proceedings of Asia and South Pacific Design Automation Conference (ASPDAC)
Notes and References
- Web site: 2014 Elevated Fellow. https://web.archive.org/web/20131213225100/http://www.ieee.org/2014Fellowclass. dead. December 13, 2013. IEEE Fellows Directory.
- Singh. H.. Ming-Hau Lee. Guangming Lu. Kurdahi. F.J.. Bagherzadeh. N.. Chaves Filho. E.M.. MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications. IEEE Transactions on Computers. May 2000. 49. 5. 465–481. 10.1109/12.859540.
- Book: Lee. Ming-Hau. Singh. Hartej. Lu. Guangming. Bagherzadeh. Nader. Kurdahi. Fadi J.. Filho. Eliseu M. C.. Alves. Vladimir Castro. Field-Programmable Custom Computing Technology: Architectures, Tools, and Applications . Design and Implementation of the MorphoSys Reconfigurable Computing Processor . 2000. 21–38. 10.1007/978-1-4615-4417-3_3. Springer, Boston, MA. en. 978-1-4613-6988-2. 10.1.1.37.3761.
- Book: Liu. Jinfeng. Chou. Pai H.. Bagherzadeh. Nader. Kurdahi. Fadi. Proceedings of the 38th conference on Design automation - DAC '01 . Power-aware scheduling under timing constraints for mission-critical embedded systems . 2001. 840–845. 10.1145/378239.379076. ACM. 978-1581132977. 1100335.
- Book: Wallace. S.. Bagherzadeh. N.. Proceedings of the 1996 Conference on Parallel Architectures and Compilation Technique . A scalable register file architecture for dynamically scheduled processors . 20 October 1996. 179–184. 10.1109/pact.1996.552666. 978-0-8186-7632-1. 10.1.1.38.8935. 10188631.
- Maestre. R.. Kurdahi. F.J.. Fernandez. M.. Hermida. R.. Bagherzadeh. N.. Singh. H.. A framework for reconfigurable computing: task scheduling and context management. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. December 2001. 9. 6. 858–873. 10.1109/92.974899. 7073491.
- Book: Gulati. M.. Bagherzadeh. N.. Proceedings. Second International Symposium on High-Performance Computer Architecture . Performance study of a multithreaded superscalar microprocessor . 3 February 1996. 291–301. 10.1109/hpca.1996.501194. 978-0-8186-7237-8. 10.1.1.51.984. 1760177.
- Web site: Khwarizmi International Award 27th Session - 2014 Khwarizmi International Award (KIA). ip.irost.org. en.
