| Nord-100 | |
| Developer: | Norsk Data |
| Manufacturer: | Norsk Data |
| Family: | Nord |
| Type: | Minicomputer |
| Generation: | 4 |
| Df: | yes --> |
| Lifespan: | 1979–198? |
| Df: | yes --> |
| Os: | Sintran III |
| Cpu: | 16-bit |
| Camera: | none |
| Touchpad: | none |
| Predecessor: | Nord-10 |
| Successor: | ND-500? |
The Nord-100 was a 16-bit minicomputer series made by Norsk Data, introduced in 1979. It shipped with the Sintran III operating system, and the architecture was based on, and backward compatible with, the Nord-10 line.
The Nord-100 was originally named the Nord-10/M (M for Micro) as a bit sliced[1] OEM processor. The board was laid out, finished, and tested when they realized that the central processing unit (CPU) was far faster than the Nord-10/S. The result was that all the marketing material for the new NORD-10/M was discarded, the board was rechristened the Nord-100, and extensively advertised as the successor of the Nord-10 line. Later, in an effort to internationalize their line, the machine was renamed ND-100.
| Minimum number of microinstructions per instruction | 3 | 3 | 1 | 1 | |
| Minimum microinstruction cycle time | 150ns | 150ns | 100ns | 100ns | |
| Whetstone MWIPS | 0.5 | 0.5 | 0.3 | 0.3 |
The ND-100 line used a custom processor, and like the PDP-11 line, the CPU decided the name of the computer.
The ND-100 line was machine-instruction compatible with the Nord-10 line, except for some extended instructions, all in supervisor mode, mostly used by the operating system. Like most processors of its time, the native bit grouping was octal, despite the 16-bit word length.
The ND-100 series had a microcoded CPU, with downloadable microcode, and was considered a complex instruction set computer (CISC) processor.
The ND-100 was implemented using medium-scale integration (MSI) logic and bit-slice processors, combining as many as the 16 boards employed in previous generations of Norsk Data computers into what was described as "the world's first high-performance single-board minicomputer".[2]
The ND-100 was frequently sold together with a memory management unit card, the MMS. The combined power use of these boards was 90 watts. The boards would usually occupy slots 2 and 3, for the CPU and MMS, respectively. Slot 1 was reserved for the Tracer, a hardware debugger system.
The CE stood for Commercial Extended. The processor was upgraded by replacing the microcode PROM.
It added instruction for decimal arithmetic and conversion, stack instructions, segment-change instructions used by the OS, a block move, test-and-set, and a read-without-cache instruction.
The ND-110 was an incremental improvement over the ND-100.
The ND-110 combined the memory management system and CPU, formerly separate cards, on one board. The single CPU/MMS board was plugged into the memory management board slot, usually numbered 3. Power consumption was reduced from 90 watts to 60.
The ND-110 made extensive use of Programmable Array Logic (PALs) and gate arrays, with semi-custom Very Large Scale Integration (VLSI) chips.
The ND-110 had three gate arrays:
Along with the macro-instruction cache memory also in the ND-100, the ND-110 had a unique implementation of cache memory on the micro-instruction level. The step termed mapping in the ND-100 was then avoided because the first micro-instruction word of a macro-instruction was written into the control store cache.
Unlike the ND-100 CPU, it handled synchronous interrupts as traps, similar to how it was handled by the ND-500.
The control store consisted of 4K x 4 bit 40ns static random-access memory (SRAM) chips. This meant that the control store was writable. It was loaded at power up and Master Clear from two 32Kx8 bit erasable programmable read-only memory (EPROM) units.
The CPU clock and the bus arbitration network were implemented using 15ns PALs.
The main oscillator was a 39.3216 MHz crystal oscillator.
This was the ND-110 with the CX microcode programmable read-only memory (PROM). The added instructions were the same as the /CE.
The ND-110CX was introduced in 1986 to replace the earlier ND-100CX model as part of a broader renewal of the company's ND-100 products, this also introducing the ND-110 Compact and ND-110 Satellite models, with existing systems being upgradable to the new configurations.[3] The ND-110CX CPU was enhanced from the earlier ND-100 processor, employing three new integrated circuits to reduce the device count from 365 to 228 and to permit the provision of the CPU on a single module. Cache memory was increased and power consumption reduced by 40 percent. ND-500 systems were also upgraded to use the ND-110CX, these employing the ND-100 architecture in an input/output processing role.[4]
A variant of the ND-110CX known as the ND-110PCX was incorporated into the Butterfly-110 workstation. This workstation was based on an IBM PC/AT-compatible model made by Ericsson, employing an Intel 80286 and featuring 512 KB of RAM, EGA display capabilities, floppy and hard drives, augmented with two expansion cards providing the ND-110PCX system.[5] The ND-110PCX was equipped with 1 MB of RAM, of which 128 KB was "donated" to the PC to provide the more desirable 640 KB configuration for DOS applications of the era.[5]
The ND-110PCX functionality was included to support applications such as the NOTIS range of software,[5] and where the workstation was deployed with terminals accessing the system via its serial ports, the complete product was known as the Butterfly Teamstation.[5] The PC system itself ran MS-DOS 3.1 which, along with other programs, booted the SINTRAN III/VSX operating system on the ND-110PCX expansion.[5] The workstation itself could run DOS software concurrently with SINTRAN applications exported to terminal users.[5]
Low-end versions of the Butterfly workstation were also marketed – models 10, 11 and 12 – these omitting the ND-110 functionality but providing Microsoft Windows and the Norsk Data Desk Top Manager software: a Windows-based version of the NOTIS-WP software able to read and write documents stored on Norsk Data systems or on the local disk.[6]
The ND-120 CPU was a complete reimplementation on an LSI chip (The so-called Delilah chip), and was originally intended to be sold as the ND-1000, to reflect the technology change, which paralleled the change from the ND-500 series to the ND-5000 (codenamed Samson).
The Samson/Delilah naming scheme may reflect that around the time of the development of the ND-120, it was increasingly clear that the mixed 16/32-bit architecture was a bottleneck for the ND-500(0) architecture; Internal technical documentation used at Norsk Data for the Delilah chip has a drawing of a grinning woman with hair in her clenched fist.