Lookahead carry unit explained

A lookahead carry unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

4-bit adder

A single 4-bit CLA is shown below:

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.

The LCU accepts the group propagate (

PG

) and group generate (

GG

) from each of the four CLAs.

PG

and

GG

have the following expressions for each CLA adder:[1]

PG=P0P1P2P3

GG=G3+G2P3+G1P2P3+G0P1P2P3

The LCU then generates the carry input for each CLA.

Assume that

Pi

is

PG

and

Gi

is

GG

from the ith CLA then the output carry bits are

C4=G0+P0C0

C8=G4+P4C4

C12=G8+P8C8

C16=G12+P12C12

Substituting

C4

into

C8

, then

C8

into

C12

, then

C12

into

C16

yields the expanded equations:

C4=G0+P0C0

C8=G4+G0P4+C0P0P4

C12=G8+G4P8+G0P4P8+C0P0P4P8

C16=G12+G8P12+G4P8P12+G0P4P8P12+C0P0P4P8P12

C4

corresponds to the carry input into the second CLA;

C8

to the third CLA;

C12

to the fourth CLA; and

C16

to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate:

PLCU=P0P4P8P12

GLCU=G12+G8P12+G4P8P12+G0P4P8P12

C16=GLCU+C0PLCU

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder.Four of these units can be combined to form a 64-bit adder.An additional (second-level) LCU is needed that accepts the propagate (

PLCU

) and generate (

GLCU

) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

References

. Randy Katz . Contemporary Logic Design . The Benjamin/Cummings Publishing Company . 1994 . 0-8053-2703-7 . 249–256 . registration .

Notes and References

  1. Web site: Carry Look Ahead Adder . 2011-10-07 . dead . https://web.archive.org/web/20110925185302/http://www.seas.upenn.edu/~ese171/lab/CarryLookAhead/CarryLookAheadF01.html . 2011-09-25 .