List of VIA microprocessor cores explained

This article lists x86-compliant microprocessors sold by VIA Technologies, grouped by technical merits: cores within same group have much in common.

Cyrix design (Cyrix III)

• All models^[1] support: MMX, 3DNow!

Marketing name	Core	Frequency			L2-cache	FPU speed	Pipeline stages	Typical power	Voltage	Process
Cyrix III	Joshua	350-450 MHz	100-133 MHz		256 KB	100%	?	13-16 W	2.2 V	180 nm Al

Centaur Technology design

• All models^[2] support: MMX, 3DNow!

Marketing name	Core	Frequency	Front-side bus	L1 cache	L2 cache	FPU speed	Pipeline stages	Typical power	Voltage	Process
Cyrix III, C3, 1GigaPro	Samuel (C5A)	466-733 MHz	100-133 MHz	128 KB	0 KB	50%	12	6.8-10.6 W	1.8-2.0 V	180 nm Al
Cyrix III, C3, 1GigaPro, Eden ESP, XP 2000+	Samuel 2 (C5B)	600-800 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.8-6.6 W	1.5-1.65 V	150 nm Al
C3, Eden ESP	Ezra (C5C)	733-933 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.3-5.9 W	1.35 V	130 nm Al
C3	Ezra-T (C5N)	800-1000 MHz	100-133 MHz	128 KB	64 KB	50%	12	5.3-11.8 W	1.35 V	130 nm Al

• All models^[3] support: MMX, SSE
• SSE2, SSE3, NX bit supported by Esther (C5J)
• x86 (no x86-64)

Marketing name	Core	Frequency	Front-side bus	L1 cache	L2 cache	FPU speed	Pipeline stages	Typical power	Voltage	Process
C3, Eden ESP, Eden-N	Nehemiah (C5XL)	800-1400 MHz	133 MHz	128 KB	64 KB	100%	16	15-19 W	1.25 or 1.4-1.45 V	130 nm Cu
C3	Nehemiah+ (C5P)	1-1.4 GHz	133 MHz	128 KB	64 KB	100%	16	11-12 W	1.25 V	130 nm Cu
C7, C7-D, C7-M, Eden, Eden ULV	Esther (C5J)	0.4-2.0 GHz	400-533 MT/s	128 KB	128 KB	100%	16	12-20 W	0.9-1.1(?) V	90 nm SOI

Series	Model	Core	Frequency [MHz]	Front-side bus [MHz]	Year	Process [nm]	Package size [mm<sup>2</sup>]	Power [W]	L2 cache [K]	L1 I/D cache [K]	Performance [SPEC2000]
Eden	Eden ESP	Samuel 2	300–600	66/100/133	2001	150	35×35	2.5–6	64	64/64
	Eden ESP	Nehemiah	667–1000	133/200	2003–2004	130	35×35	6–7	64	64/64
	Eden-N	Nehemiah	533–1000	133	2003	130	15×15	2.5–7	64	64/64
	Eden	Esther	400–1500	400–800	2006–2007	90	30	<7.5	128	32/32
	Eden X2		800		2011	40	11×6
C3	C3	Samuel 2	667–800	100–133	2001	150		13	64	64/64
	C3	Ezra	800–1000	100–133	2002	130		8.3–10	64	64/64
	C3	Nehemiah	1000–1400	133–200	2003	130	35×35	15–21	64	64/64
	C3-M	Nehemiah	1000–1400	133–200	2003	130	35×35	11–19	64	64/64
C7	C7-D	Esther	1500–1800	400	2006	90	21×21	20–25	128	16/16
	C7-M	Esther	1000–2000	400	2005	90	21×21	12–20	128	16/16
	C7	Esther	1500–2000	800	2007	90	21×21	12–20	128	16/16

• First VIA processor with x86-64 instruction set

• See List of Nano microprocessors

CHA

• Announced 2019.^{[6] [7] [8]} Discontinued in 2021 with the sales of Centaur to Intel.^[9]
• 8 cores + "NCORE" neural processor for AI acceleration.
• supports: MMX SSE SSE2 SSE3 SSSE3 SSE4.1 SSE4.2 AES AVX AVX2 FMA3 SHA AVX512 AVX512F AVX512CD AVX512BW AVX512DQ AVX512VL AVX512IFMA AVX512VBMI.

Marketing name	Code name	Core	Number of cores	Frequency	Microarchitecture	L1 cache	L2 cache	L3 cache	Announced	Expected Release	Process	Socket Type	Pipeline stages	PCIe Lanes
unknown	CHA	CNS	8	2.5 GHz	CNS^[10]	32 KiB	256 KiB	16 MB	2019	2H 2020^[11]	16 nm	LGA	20-22	44^[12]

See also

• List of VIA C3 microprocessors
• List of VIA C7 microprocessors
• List of VIA Eden microprocessors
• List of VIA Nano microprocessors

External links

• Via C3 product page
• Via C7 product page
• Via Nano product page

Notes and References

1. Web site: IA-32 implementation: VIA Cyrix III . sandpile.org . 2007-07-23 . dead . https://web.archive.org/web/20070709200826/http://www.sandpile.org/impl/m2c3.htm . 2007-07-09 .
2. Web site: IA-32 implementation: VIA C3 . sandpile.org . 2007-07-23 . dead . https://web.archive.org/web/20070717014946/http://www.sandpile.org/impl/c5.htm . 2007-07-17 .
3. Web site: IA-32 implementation: VIA C7 . sandpile.org . 2007-07-23 . dead . https://web.archive.org/web/20070630151130/http://www.sandpile.org/impl/c5xl.htm . 2007-06-30 .
4. Web site: VIA QuadCore Processor . Via.com . 2014-02-03.
5. Web site: VIA Nano X2 Whitepaper . Via.com . 2014-02-03 . dead . https://web.archive.org/web/20120527051549/http://www.via.com.tw/en/downloads/whitepapers/processors/NanoX2_whitepaper_201107.pdf . 27 May 2012 . dmy-all .
6. Web site: November 18, 2019h. VIA CenTaur Develops a Multi-core x86 Processor for Enterprise with in-built AI Hardware. 2020-07-28. TechPowerUp. en.
7. Web site: February 18, 2020. VIA CenTaur CHA NCORE AI CPU Pictured, a Socketed LGA Package. 2020-07-28. TechPowerUp. en.
8. Web site: CHA - Microarchitectures - Centaur Technology - WikiChip. 2020-07-28. en.wikichip.org. en.
9. Web site: The Last x86 Via Chip: Unreleased Next-Gen Centaur CNS Saved From Trash Bin, Tested . TomsHardware . 22 February 2022.
10. Web site: December 11, 2019. VIA x86 AI processor architecture, performance announcement: comparable to Intel 32 core. Small Tech News.
11. Web site: December 9, 2019. Centaur Releases In-Depth Analysis from The Linley Group for its NCORE-Equipped x86 Processor. 2020-08-30. TechPowerUp. en.
12. Web site: World's First High-Performancex86 SoCwithIntegrated AI Coprocessor. usurped. https://web.archive.org/web/20191119163412/https://centtech.com/wp-content/uploads/PRSlides_1118_Release.pdf. November 19, 2019. centtech. 4.