Gem5 Explained

gem5
Developer:	Community
Latest Release Version:	v23.1
Programming Language:	C++, Python
Operating System:	Linux
License:	Revised BSD License

The gem5 simulator is an open-source system-level and processor simulator. It is utilized in academic research and in industry by companies such as ARM Research, AMD Research, Google, Micron, Metempsy, HP, and Samsung.^{[1] [2]} Arm has developed further software called Streamline for developers working with gem5 which aims to present "a graphical view of system execution".^[3]

History

The gem5 simulator was born out of the merger of m5 (CPU simulation framework) and GEMS (memory timing simulator).^[4]

Features

gem5 is an event-driven simulator with multiple execution modes.

• full-system emulation (simulating the whole OS) and syscall emulation (just user-space is emulated)
• multiple ISAs (Alpha, ARM, SPARC, MIPS, POWER, RISC-V, and x86 ISAs)
• timing model for the full cache hierarchy with support for custom coherence protocols
• simplistic CPU, in-order CPU, out-of-order CPU
• serialize/deserialization from checkpoints

External links

• • Source code

Notes and References

1. Web site: gem5: About. 14 November 2019.
2. Web site: Simulation Research and gem5. Davis Architecture Research. 22 June 2022.
3. Web site: Streamline for gem5. Arm Developer. 22 June 2022.
4. Binkert. Nathan. Sardashti. Somayeh. Sen. Rathijit. Sewell. Korey. Shoaib. Muhammad. Vaish. Nilay. Hill. Mark D.. Wood. David A.. Beckmann. Bradford. Black. Gabriel. Reinhardt. Steven K.. 2011-08-31. The gem5 simulator. ACM SIGARCH Computer Architecture News. en. 39. 2. 1–7. 10.1145/2024716.2024718. 195349294 .