| Elbrus-8S | |
| Produced-Start: | end of 2014 prototypes, |
| Slowest: | 1.3 |
| Slow-Unit: | GHz |
| Designfirm: | MCST |
| Arch: | Elbrus 2000 |
| Numcores: | 8 |
| Predecessor: | Elbrus-4S |
| Successor: | Elbrus-16S |
| Elbrus-8SV | |
| Produced-Start: | end of 2017 prototypes, 2018 |
| Slowest: | 1.5 |
| Slow-Unit: | GHz |
| Designfirm: | MCST |
| Arch: | Elbrus 2000 |
| Numcores: | 8 |
| Predecessor: | Elbrus-4S |
| Successor: | Elbrus-16S |
The Elbrus-8S (Russian: Эльбрус-8С) is a Russian 28 nanometer 8-core microprocessor developed by Moscow Center of SPARC Technologies (MCST). The first prototypes were produced by the end of 2014 and serial production started in 2016.[1] The Elbrus-8S is to be used in servers and workstations.[2] The processor's architecture allows support of up to 32 processors on a single server motherboard.[3] [4]
In 2018 MCST announced plans to produce the Elbrus-8SV, an upgraded version of the 8C with doubled performance. The CPU can process 576 Gflops and has a frequency of 1.5 GHz, as well as DDR4 support instead of DDR3. Engineering samples were already completed in Q3 2017.[5] Development was completed in 2019[6] and its fabrication started in 2020.
In 2021 the processor was offered to Sberbank, Russia's largest bank, for evaluation in light of a potential use for some of the company's hardware needs. The evaluation had a negative outcome, as the functional requirements were not met.[7]
2023 benchmark demonstrated that the Elbrus-8SV performed moderately in gaming with games that were 10 years old but was incompatible with modern games tested.[8]
Successor Elbrus-16C was announced in 2020 with declared start of manufacturing in October 2021[9] but hasn't entered the market as of 2023 yet.
The Elbrus-8S and -SV processors support binary compatibility with Intel x86 and x86-64 processors via runtime binary translation. The documentation suggests that the processors can run Windows XP and Windows 7. The processors can also run a Linux kernel based OS compiled for Elbrus.
| Production start | 2014 (samples), 2015 (for data-servers) | |
|---|---|---|
| Cores | 8 | |
| Computer architecture | VLIW, Elbrus (proprietary, closed) version 4, 64-bit | |
| Tech. node | 28 nm, TSMC process | |
| Clock rate | 1.3 GHz | |
| Cache |
| |
| Integrated memory controller | DDR3-1600, 4 72-bit channels (with ECC) | |
| 125 for DP or 250 for SP | ||
| Supported programming platforms | C, C++, Java, Fortran 77, Fortran 90 | |
| Performance | 250 Gflops |
| Production start | 2018 Q4[10] | |
|---|---|---|
| Cores | 8 | |
| Computer architecture | VLIW, Elbrus (proprietary, closed) version 5, 64-bit | |
| Tech. node | 28 nm, TSMC process | |
| Clock rate | 1.5 GHz | |
| Cache |
| |
| Integrated memory controller | 4 channel DDR4-2400 registered as ECC, to 68.3 GB/s64 GB per processor, 1 TB address space | |
| 288 for DP or 576 for SP | ||
| Operating conditions | −60...+85 °C, −40...+90 °C | |
| Performance | 576 Gflops |