Compact Model Coalition Explained

The Compact Model Coalition (formerly the Compact Model Council)^[1] is a working group in the Electronic Design Automation industry formed to choose, maintain and promote the use of standard semiconductor device models.^[2] Commercial and industrial analog simulators (such as SPICE) need to add device models as technology advances (see Moore's law) and earlier models become inaccurate. Before this group was formed, new transistor models were largely proprietary, which severely limited the choice of simulators that could be used.

It was formed in August, 1996, for the purpose developing and standardizing the use and implementation of SPICE models and the model interfaces. In May 2013, the Silicon Integration Initiative (Si2) and TechAmerica announced the transfer of the Compact Model Council to Si2 and a renaming to Compact Model Coalition.^[3]

New models are submitted to the Coalition, where their technical merits are discussed, and then potential standard models are voted on.^[4]

Some of the models supported by the Compact Modeling Coalition include:

• BSIM3,^[5] a MOSFET model from UC Berkeley (see BSIM).
• BSIM4,^[6] a more modern MOSFET model, also from UC Berkeley.
• PSP,^{[7] [8]} another MOSFET model. PSP originally stood for Penn State-Philips, but one author moved to ASU, and Philips spun off their semiconductor group as NXP Semiconductors. PSP is now developed and supported at CEA-Leti.
• BSIMSOI,^[9] a model for silicon on insulator MOSFETs.
• L-UTSOI,^[10] a model for fully-depleted silicon on insulator MOSFETs, developed and supported by CEA-Leti.
• HICUM^[11] or HIgh CUrrent Model for bipolar transistors, from CEDIC, Dresden University of Technology, Germany, and UC San Diego, USA.
• MEXTRAM,^[12] a compact model for bipolar transistors that aims to support the design of bipolar transistor circuits at high frequencies in Si and SiGe based process technologies. MEXTRAM was originally developed at NXP Semiconductors and is now developed and supported at Auburn University.
• ASM-HEMT,^[13] and MVSG,^[14] the newest standard models for Gallium Nitride (GaN) transistors.

To address the increasing need for Reliability (ageing) simulation the CMC nominated the OMI Interface as the new EDA vendor independent solution for ageing simulations. Technically the Interface is very close the TMI2 Interface developed by TSMC. The standardization will allow Silicon Foundries to develop a common set of aging models that will work with all significant analog simulators.

See also

• Electronic circuit simulation

External links

• Member list at CMC website
• Site map of CMC website including links to working groups

Notes and References

1. Web site: CMC - Compact Model Council . Government Electronics & Information Technology Association (GEIA) . dead . https://web.archive.org/web/20110511071827/http://www.geia.org/index.asp?bid=597 . 2011-05-11 .
2. Web site: Standard Models and Downloads . Government Electronics & Information Technology Association (GEIA) . dead . https://web.archive.org/web/20110720190121/http://www.geia.org/index.asp?bid=1333 . 2011-07-20 .
3. Web site: CMC Moves to Si2. Silicon Integration Initiative, Inc. 2015-10-19.
4. Web site: SIMULATION: PSP transistor tapped for standard . EETimes . Dylan McGrath.
5. Web site: BSIM3 Model. BSIM Group, UC Berkeley.
6. Web site: BSIM4 Model. BSIM Group, UC Berkeley.
7. Web site: PSP . ASU . dead . https://web.archive.org/web/20071017140132/http://pspmodel.asu.edu/ . 2007-10-17 .
8. Web site: PSP . 19 October 2013 . CEA-Leti. 2023-08-17 .
9. Web site: BSIM-SOI Model. BSIM Group, UC Berkeley.
10. Web site: L-UTSOI Model. 19 October 2013. CEA-Leti. 2023-08-17.
11. Web site: HICUM Introduction . TU Dresden . M. Schröter, L.Hofmann.
12. Web site: MEXTRAM Homepage. Auburn University.
13. Web site: ASM-HEMT Homepage. IIT Kanpur.
14. Web site: MVSG Source code. MIT, hosted by Si2. 2018-05-08. https://web.archive.org/web/20180509013241/http://www.si2.org/wordpress/wp-content/uploads/2018/05/MVSG_CMC_APR_2018.zip. 2018-05-09. dead.