CalDriCon is an electrical digital signaling interface that for high definition liquid crystal displays (LCDs) for high-definition televisions and mobile handsets. It was originally developed by THine Electronics, Inc.
In around 2000, LCD-panels often selected high-speed driver interfaces such as mini-LVDS, developed by Texas Instruments, and RSDS (Reduced Swing Differential Signaling), developed by National Semiconductor.
However, as full HD televisions were launched in 2005 and full HD with double frame rate in 2007, higher-speed demands in high-definition televisions have required advanced technologies in driver interfaces. In such situation, new LCD driver interfaces such as Advanced PPmL and CalDriCon have appeared to solve the constraints of high-speed technologies.
Among new LCD driver interfaces, CalDriCon satisfies both of high-speed requirements of 2.0 Gbit/s/lane and noise tolerances against unstable power sources and grounds as well as auto-adjustment of skew between clock and data.
| Comparison among LCD driver interfaces | ||||
| name | mini-LVDS | Advanced PPmL | CalDriCon | |
|---|---|---|---|---|
| Data rate per lane | ~300 Mbit/s | ~2.0 Gbit/s | ~2.0 Gbit/s | |
| Connection | Bus topology | Point-to-Point | Point-to-Point | |
| Signal integrity distortion by multi-drop | Appear | Not appear | Not appear | |
| Skew adjustment between clock and data | Not available | Not required | Auto-adjustable | |
| Noise tolerance for unstable power sources and ground | Strong: driver ICs do not have PLL circuits | Weak: driver ICs have PLL circuits | Strong: driver ICs do not have PLL circuits | |
As driver ICs are generally loaded as COF (chip-on-film), they are often affected by noises from unstable power sources and ground. While mini-LVDS and RSDS were based on differential signaling and relatively tolerant for noise, they have faced difficulties to achieve higher-speed performance than 1 Gpbs because of no skew adjustment between clock and power.
On the other hand, many of advanced LCD driver interfaces, using CDR (or clock data recovery) technology, remove the necessities to adjust skew between clock and data and achieved higher data rate over 1 Gbit/s. However, CDR technology requires having PLL circuits on receiving driver ICs. COF is easily affected by the noise of power source and ground.
CalDriCon, instead of using CDR, detects the optimal sampling points at receiving driver ICs and adjust the transmitting phase between clock and data. This feature achieves both of high-speed of 2 Gbit/s and noise tolerances in unstable power sources and ground as well solution of skew adjustment.
In addition, CalDriCon and many other advanced driver interfaces adopt Point-to-Point connection that brings much less distortion of signal integrity even in the multi-drop connection than mini-LVDS that is often affected by noise because of its bus topology.